Change in ...coreboot[master]: Makefile: Turn off SSE instructions for x86_32 architecture

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32887 )

Change subject: Makefile: Turn off SSE instructions for x86_32 architecture
......................................................................

Patch Set 2:

(3 comments)

https://review.coreboot.org/#/c/32887/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/#/c/32887/2//COMMIT_MSG@14 
PS2, Line 14: it's code generation appears unaffected.
GCC has CFLAGS -march=i686 for coreboot proper and this simply keeps both SSE/SSE2 disabled. We do have some inline asm for quadword writes, also grep for CONFIG(SSE).

Alternative is to choose a conservative CPU type with Clang, such that opcodes that require additional enable bits set (like that in CR4 for SSE) are disabled by default.

https://review.coreboot.org/#/c/32887/2//COMMIT_MSG@18 
PS2, Line 18: code
            : code
> One is enough.

Failing QEMU command line? If the emulated CPU is without SSE support, invalid opcode is the expected result.

Does that Clang build (with SSE enabled) still fail if you add "select SSE" for cpu/qemu-x86/Konfig? If so, there's a possible stack aligment issue to solve somewhere.

https://review.coreboot.org/#/c/32887/2//COMMIT_MSG@26 
PS2, Line 26: B. "Fix" Clang so that no-mmx implies no-sse (Will take a long time)
Why would you want no-mmx imply no-sse? Separate sets of registers (mmx vs xmm, afair).