Attention is currently required from: Patrick Rudolph. Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56174 )
Change subject: soc/intel/common/irq: Program IRQ pin in irq_program_non_pch() ......................................................................
soc/intel/common/irq: Program IRQ pin in irq_program_non_pch()
Previously, irq_program_non_pch() was only programming the IRQ line, but the pin is required as well.
BUG=b:176858827
Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Change-Id: I2a2823c183a3495721a912de285cddb4a9444c55 --- M src/soc/intel/common/block/irq/irq.c 1 file changed, 6 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/56174/1
diff --git a/src/soc/intel/common/block/irq/irq.c b/src/soc/intel/common/block/irq/irq.c index babfa76..6f1a9e5 100644 --- a/src/soc/intel/common/block/irq/irq.c +++ b/src/soc/intel/common/block/irq/irq.c @@ -432,10 +432,12 @@ continue; }
- if (entry->irq) - pci_s_write_config8(PCI_DEV(0, PCI_SLOT(entry->devfn), - PCI_FUNC(entry->devfn)), - PCI_INTERRUPT_LINE, entry->irq); + if (entry->irq) { + pci_devfn_t dev = PCI_DEV(0, PCI_SLOT(entry->devfn), + PCI_FUNC(entry->devfn)); + pci_s_write_config8(dev, PCI_INTERRUPT_LINE, entry->irq); + pci_s_write_config8(dev, PCI_INTERRUPT_PIN, (uint8_t)entry->pin); + }
entry = entry->next; }