Change in coreboot[master]: soc/amd/cezanne/acpi: Add MMIO devices - coreboot-gerrit

12 Feb 2021


      Attention is currently required from: Jason Glenesk, Raul Rangel, Mathew King, Felix Held.
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50573 )
Change subject: soc/amd/cezanne/acpi: Add MMIO devices
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Patch Set 2: Code-Review+2
(1 comment)
File src/soc/amd/cezanne/acpi/mmio.asl:
https://review.coreboot.org/c/coreboot/+/50573/comment/930e2a73_6b7b428b 
PS2, Line 315: Package () { "is-rv", 1 },
...
dp_48m_refclk_selection only shows a 48mhz clock, so i think it's correct.
Agreed.  Have been looking at that that triggers, as well as a few PPRs, and I believe it just wasn't named with forward compatibility in mind.
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Iddfb975e9292785d0951dd7bb31c1997d2185abd
Gerrit-Change-Number: 50573
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