[M] Change in coreboot[main]: soc/amd/glinda/pcie_gpp.c: Add PCI routing table - coreboot-gerrit

6 Nov 2024


      Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/85019?usp=email )
Change subject: soc/amd/glinda/pcie_gpp.c: Add PCI routing table
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Patch Set 1:
(1 comment)
File src/soc/amd/glinda/pcie_gpp.c:
https://review.coreboot.org/c/coreboot/+/85019/comment/e4cf14b6_11bfd008?usp... :
PS1, Line 11: 0
I am not 100% sure that I configured the bridge_irqs correctly (or if I need to configure it at all, since we apparently don't do anything with it).
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Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I44c11205ecc1554451a5e9d8f05102fd0d4d25ad
Gerrit-Change-Number: 85019
Gerrit-PatchSet: 1
Gerrit-Owner: Maximilian Brune maximilian.brune@9elements.com
Gerrit-Comment-Date: Wed, 06 Nov 2024 22:13:51 +0000
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