Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56793 )
Change subject: soc/mediatek/mt8195: Enable PCIe support ......................................................................
soc/mediatek/mt8195: Enable PCIe support
Enable PCIe support for mt8195.
TEST=Build pass and boot up to kernel successfully via SSD on Dojo board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x15b7 PCI SSVID : 0x15b7 SN : 21517J440114 MN : WDC PC SN530 SDBPTPZ-256G-1006 RAB : 0x4 AERL : 0x7 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006
BUG=b:178565024
Signed-off-by: Jianjun Wang jianjun.wang@mediatek.com Change-Id: I314572955f1021abe9f2f0f4635670135ed08fff Reviewed-on: https://review.coreboot.org/c/coreboot/+/56793 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Yu-Ping Wu yupingso@google.com --- M src/soc/mediatek/mt8195/Kconfig M src/soc/mediatek/mt8195/soc.c 2 files changed, 14 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved
diff --git a/src/soc/mediatek/mt8195/Kconfig b/src/soc/mediatek/mt8195/Kconfig index d1cb09b..dab1590 100644 --- a/src/soc/mediatek/mt8195/Kconfig +++ b/src/soc/mediatek/mt8195/Kconfig @@ -10,6 +10,7 @@ select HAVE_UART_SPECIAL select SOC_MEDIATEK_COMMON select DPM_FOUR_CHANNEL + select PCI
if SOC_MEDIATEK_MT8195
diff --git a/src/soc/mediatek/mt8195/soc.c b/src/soc/mediatek/mt8195/soc.c index d28f668..995aadc 100644 --- a/src/soc/mediatek/mt8195/soc.c +++ b/src/soc/mediatek/mt8195/soc.c @@ -2,6 +2,7 @@
#include <bootmem.h> #include <device/device.h> +#include <device/pci.h> #include <soc/apusys.h> #include <soc/devapc.h> #include <soc/dfd.h> @@ -9,6 +10,7 @@ #include <soc/hdmi.h> #include <soc/mcupm.h> #include <soc/mmu_operations.h> +#include <soc/pcie.h> #include <soc/sspm.h> #include <soc/ufs.h> #include <symbols.h> @@ -44,9 +46,19 @@ .init = soc_init, };
+static struct device_operations pci_domain_ops = { + .read_resources = &mtk_pcie_domain_read_resources, + .set_resources = &mtk_pcie_domain_set_resources, + .scan_bus = &pci_domain_scan_bus, + .enable = &mtk_pcie_domain_enable, +}; + static void enable_soc_dev(struct device *dev) { - dev->ops = &soc_ops; + if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) + dev->ops = &soc_ops; + else if (dev->path.type == DEVICE_PATH_DOMAIN) + dev->ops = &pci_domain_ops; }
struct chip_operations soc_mediatek_mt8195_ops = {
21 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.