Attention is currently required from: Yidi Lin. Hello Yidi Lin,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/53899
to review the following change.
Change subject: mb/google/cherry: Enable Chrome EC ......................................................................
mb/google/cherry: Enable Chrome EC
Signed-off-by: Yidi Lin yidi.lin@mediatek.com Change-Id: Iab3549b5c4e7d845ddd284a0df3fb448e11fbdcb --- M src/mainboard/google/cherry/Kconfig M src/mainboard/google/cherry/bootblock.c M src/mainboard/google/cherry/chromeos.c M src/mainboard/google/cherry/reset.c 4 files changed, 18 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/53899/1
diff --git a/src/mainboard/google/cherry/Kconfig b/src/mainboard/google/cherry/Kconfig index bf46532..b9c63ea 100644 --- a/src/mainboard/google/cherry/Kconfig +++ b/src/mainboard/google/cherry/Kconfig @@ -6,14 +6,22 @@
if BOARD_GOOGLE_CHERRY_COMMON
+config VBOOT + select EC_GOOGLE_CHROMEEC_SWITCHES + select VBOOT_VBNV_FLASH + config BOARD_SPECIFIC_OPTIONS def_bool y select SOC_MEDIATEK_MT8195 select BOARD_ROMSIZE_KB_8192 select MAINBOARD_HAS_CHROMEOS + select CHROMEOS_USE_EC_WATCHDOG_FLAG if CHROMEOS select COMMON_CBFS_SPI_WRAPPER select SPI_FLASH select SPI_FLASH_INCLUDE_ALL_DRIVERS + select EC_GOOGLE_CHROMEEC + select EC_GOOGLE_CHROMEEC_BOARDID + select EC_GOOGLE_CHROMEEC_SPI
config MAINBOARD_DIR string @@ -28,4 +36,8 @@ config BOOT_DEVICE_SPI_FLASH_BUS int default 7 + +config EC_GOOGLE_CHROMEEC_SPI_BUS + hex + default 0x0 endif diff --git a/src/mainboard/google/cherry/bootblock.c b/src/mainboard/google/cherry/bootblock.c index adb87d0..dbc6c26 100644 --- a/src/mainboard/google/cherry/bootblock.c +++ b/src/mainboard/google/cherry/bootblock.c @@ -3,6 +3,7 @@ #include <bootblock_common.h> #include <device/mmio.h> #include <soc/gpio.h> +#include <soc/spi.h>
#include "gpio.h"
@@ -35,6 +36,7 @@
void bootblock_mainboard_init(void) { + mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0); nor_set_gpio_pinmux(); setup_chromeos_gpios(); } diff --git a/src/mainboard/google/cherry/chromeos.c b/src/mainboard/google/cherry/chromeos.c index f606ba3..1a869a3 100644 --- a/src/mainboard/google/cherry/chromeos.c +++ b/src/mainboard/google/cherry/chromeos.c @@ -28,9 +28,3 @@ }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } - -int get_recovery_mode_switch(void) -{ - /* TODO: use Chrome EC switches when EC support is added */ - return 0; -} diff --git a/src/mainboard/google/cherry/reset.c b/src/mainboard/google/cherry/reset.c index 3a97ee5..91ee7c0 100644 --- a/src/mainboard/google/cherry/reset.c +++ b/src/mainboard/google/cherry/reset.c @@ -1,7 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <gpio.h> #include <reset.h>
+#include "gpio.h" + void do_board_reset(void) { + gpio_output(GPIO_RESET, 1); }