Change in coreboot[master]: soc/intel: cnl,icl,elh,jsl,tgl: enable C6DRAM - coreboot-gerrit

15 Sep 2020


      Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45417 )
Change subject: soc/intel: cnl,icl,elh,jsl,tgl: enable C6DRAM
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Patch Set 1:
There are 0 mainboards that use this feature right now, and you want to enable it for all of those platforms? Have you tested it on any?
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I556dba59bc06c9101bdfdfd6aee00610aac516e3
Gerrit-Change-Number: 45417
Gerrit-PatchSet: 1
Gerrit-Owner: Michael Niewöhner foss@mniewoehner.de
Gerrit-Reviewer:  Felix Singer felixsinger@posteo.net
Gerrit-Reviewer: Elyes HAOUAS
Gerrit-Reviewer: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: Kyösti Mälkki kyosti.malkki@gmail.com
Gerrit-Reviewer: Nathaniel L Desimone nathaniel.l.desimone@intel.com
Gerrit-Reviewer: Nico Huber nico.h@gmx.de
Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net
Gerrit-Reviewer: Subrata Banik subrata.banik@intel.com
Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-Comment-Date: Tue, 15 Sep 2020 17:29:44 +0000
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