[M] Change in coreboot[master]: mb/intel/mtlrvp: Add MTL-P RVP board ids

[Harsha B R (Code Review)]

Attention is currently required from: Wonkyu Kim, Ravishankar Sarawadi, Rizwan Qureshi, Angel Pons, Krishna P Bhat D, Tim Wawrzynczak, Tarun Tuli, Jamie Ryu, Subrata Banik, Kapil Porwal, Nick Vaccaro, Ronak Kanabar, Raj Astekar.

Harsha B R has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66102 )

Change subject: mb/intel/mtlrvp: Add MTL-P RVP board ids
......................................................................

Patch Set 11:

(3 comments)

File src/mainboard/intel/mtlrvp/board_id.c:

https://review.coreboot.org/c/coreboot/+/66102/comment/fc1911bd_d4af4db0 
PS4, Line 10:
> > created cros_bug to address this as a separate CL. […]

yes, thats correct.

File src/mainboard/intel/mtlrvp/variants/baseboard/include/baseboard/variants.h:

https://review.coreboot.org/c/coreboot/+/66102/comment/cf84afa6_6aaa8256 
PS10, Line 6: #include <soc/gpio.h>
            : #include <soc/meminit.h>
> do we need these headers now ?

Ack

https://review.coreboot.org/c/coreboot/+/66102/comment/381ce12a_efd292e6 
PS10, Line 11: 	MTL_SPD_SMBUS_SIMICS = 0x30,
             : 	MTL_SPD_CBFS_SIMICS = 0x31
> why we need simics now ?

Ack