Change in ...coreboot[master]: soc/intel/icelake: Select FSP_M_XIP

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32507 )

Change subject: soc/intel/icelake: Select FSP_M_XIP
......................................................................

soc/intel/icelake: Select FSP_M_XIP

This patch ports CB:32275 changes from CNL to ICL.

Ice Lake require that FSP-M component should be
XIP. This change selects FSP_M_XIP so that the right arguments are
passed into cbfstool when adding this component.

Change-Id: Icc5550f1f94957fa1b28c8bba6fc0efee98e233e
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32507
Reviewed-by: Rizwan Qureshi 
Reviewed-by: Ronak Kanabar 
Reviewed-by: Furquan Shaikh 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/icelake/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved
  Rizwan Qureshi: Looks good to me, approved
  Ronak Kanabar: Looks good to me, but someone else must approve

diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 2fbc6da..a4b46ba 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -19,6 +19,7 @@
    select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
    select COMMON_FADT
    select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
+	select FSP_M_XIP
    select GENERIC_GPIO_LIB
    select HAVE_FSP_GOP
    select INTEL_DESCRIPTOR_MODE_CAPABLE