Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32591 )
Change subject: mb/intel/saddlebrook: Refactor to get rid of `pei_data` ......................................................................
mb/intel/saddlebrook: Refactor to get rid of `pei_data`
The SoC specific `struct pei_data` was filled with values that were later only consumed by the mainboard code again. Avoid jumping through this hoop and fill FSP UPDs directly.
Change-Id: I399dd89f85ccea43fdf90bd895e71324f4b409cc Signed-off-by: Nico Huber nico.h@gmx.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/32591 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Matt DeVillier matt.devillier@gmail.com Reviewed-by: Patrick Rudolph siro@das-labor.org --- M src/mainboard/intel/saddlebrook/Makefile.inc D src/mainboard/intel/saddlebrook/pei_data.c M src/mainboard/intel/saddlebrook/romstage.c M src/mainboard/intel/saddlebrook/spd/spd_util.c 4 files changed, 4 insertions(+), 46 deletions(-)
Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, but someone else must approve Patrick Rudolph: Looks good to me, approved
diff --git a/src/mainboard/intel/saddlebrook/Makefile.inc b/src/mainboard/intel/saddlebrook/Makefile.inc index 63889af..683462b 100644 --- a/src/mainboard/intel/saddlebrook/Makefile.inc +++ b/src/mainboard/intel/saddlebrook/Makefile.inc @@ -17,6 +17,5 @@ subdirs-y += spd
bootblock-y += bootblock.c -romstage-y += pei_data.c
ramstage-y += ramstage.c diff --git a/src/mainboard/intel/saddlebrook/pei_data.c b/src/mainboard/intel/saddlebrook/pei_data.c deleted file mode 100644 index ac4ce95..0000000 --- a/src/mainboard/intel/saddlebrook/pei_data.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Google Inc. - * Copyright (C) 2015 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <soc/pei_data.h> -#include <soc/pei_wrapper.h> -#include "spd/spd.h" - -void mainboard_fill_pei_data(struct pei_data *pei_data) -{ - mainboard_fill_dq_map_data(&pei_data->dq_map); - mainboard_fill_dqs_map_data(&pei_data->dqs_map); - mainboard_fill_rcomp_res_data(&pei_data->RcompResistor); - mainboard_fill_rcomp_strength_data(&pei_data->RcompTarget); -} diff --git a/src/mainboard/intel/saddlebrook/romstage.c b/src/mainboard/intel/saddlebrook/romstage.c index d19629c..48d39db 100644 --- a/src/mainboard/intel/saddlebrook/romstage.c +++ b/src/mainboard/intel/saddlebrook/romstage.c @@ -19,8 +19,6 @@ #include <fsp/api.h> #include <string.h> #include <soc/gpio.h> -#include <soc/pei_data.h> -#include <soc/pei_wrapper.h> #include <soc/pm.h> #include <soc/romstage.h> #include "spd/spd.h" @@ -38,8 +36,6 @@ void mainboard_romstage_entry(struct romstage_params *params) { post_code(0x31); - /* Fill out PEI DATA */ - mainboard_fill_pei_data(params->pei_data); romstage_common(params); }
@@ -67,18 +63,10 @@ * should be set in the FSP flash image and should not need to be * changed. */ - memcpy(memory_params->DqByteMapCh0, params->pei_data->dq_map[0], - sizeof(params->pei_data->dq_map[0])); - memcpy(memory_params->DqByteMapCh1, params->pei_data->dq_map[1], - sizeof(params->pei_data->dq_map[1])); - memcpy(memory_params->DqsMapCpu2DramCh0, params->pei_data->dqs_map[0], - sizeof(params->pei_data->dqs_map[0])); - memcpy(memory_params->DqsMapCpu2DramCh1, params->pei_data->dqs_map[1], - sizeof(params->pei_data->dqs_map[1])); - memcpy(memory_params->RcompResistor, params->pei_data->RcompResistor, - sizeof(params->pei_data->RcompResistor)); - memcpy(memory_params->RcompTarget, params->pei_data->RcompTarget, - sizeof(params->pei_data->RcompTarget)); + mainboard_fill_dq_map_data(&memory_params->DqByteMapCh0); + mainboard_fill_dqs_map_data(&memory_params->DqsMapCpu2DramCh0); + mainboard_fill_rcomp_res_data(&memory_params->RcompResistor); + mainboard_fill_rcomp_strength_data(&memory_params->RcompTarget);
/* update spd length*/ memory_params->MemorySpdDataLen = blk.len; diff --git a/src/mainboard/intel/saddlebrook/spd/spd_util.c b/src/mainboard/intel/saddlebrook/spd/spd_util.c index 2c26d78..5055d9a 100644 --- a/src/mainboard/intel/saddlebrook/spd/spd_util.c +++ b/src/mainboard/intel/saddlebrook/spd/spd_util.c @@ -15,8 +15,6 @@
#include <stdint.h> #include <string.h> -#include <soc/pei_data.h> -#include <soc/pei_wrapper.h> #include "spd.h"
void mainboard_fill_dq_map_data(void *dq_map_ptr)