Patch set updated for coreboot: ed3a70e baytrail: Add function to read top of low memory

[Aaron Durbin]

Aaron Durbin ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4935

-gerrit

commit ed3a70e2f4e3b328aa13e98437127b4448a1f5f0
Author: Duncan Laurie 
Date:   Mon Nov 4 17:02:45 2013 -0800

baytrail: Add function to read top of low memory

The top of low memory is also the start of the region where
    PCIe resources are allocated.  This needs to be passed in
    ACPI but is only readable from IOSF.

BUG=chrome-os-partner:23505
    BRANCH=rambi
    TEST=build and boot on rambi

Change-Id: Iad95335f72dc3e35b837bedb8d52d388c861a330
    Signed-off-by: Duncan Laurie 
    Reviewed-on: https://chromium-review.googlesource.com/175625
    Reviewed-by: Aaron Durbin 
    Signed-off-by: Aaron Durbin 
---
 src/soc/intel/baytrail/baytrail/iomap.h | 5 +++++
 src/soc/intel/baytrail/northcluster.c   | 8 +++++++-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/soc/intel/baytrail/baytrail/iomap.h b/src/soc/intel/baytrail/baytrail/iomap.h
index 77a55f5..d231dee 100644
--- a/src/soc/intel/baytrail/baytrail/iomap.h
+++ b/src/soc/intel/baytrail/baytrail/iomap.h
@@ -79,4 +79,9 @@

#define SMBUS_BASE_ADDRESS		0xefa0

+#ifndef __ACPI__
+/* Read Top of Low Memory (BMBOUND) */
+uint32_t nc_read_top_of_low_memory(void);
+#endif
+
 #endif /* _BAYTRAIL_IOMAP_H_ */
diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c
index eca122c..e259163 100644
--- a/src/soc/intel/baytrail/northcluster.c
+++ b/src/soc/intel/baytrail/northcluster.c
@@ -23,6 +23,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>

+#include <baytrail/iomap.h>
 #include <baytrail/iosf.h>
 #include <baytrail/pci_devs.h>
 #include <baytrail/ramstage.h>
@@ -64,6 +65,11 @@
  */
 #define RES_IN_KiB(r) ((r) >> 10)

+uint32_t nc_read_top_of_low_memory(void)
+{
+	return iosf_bunit_read(BUNIT_BMBOUND) & ~((1 << 27) - 1);
+}
+
 static void nc_read_resources(device_t dev)
 {
    unsigned long mmconf;
@@ -107,7 +113,7 @@ static void nc_read_resources(device_t dev)
    	reserved_ram_resource(dev, index++, smmrrl, smmrrh - smmrrl);

/* All address space between bmbound and smmrrh is unusable. */
-	bmbound = RES_IN_KiB(iosf_bunit_read(BUNIT_BMBOUND) & ~((1 << 27) - 1));
+	bmbound = RES_IN_KiB(nc_read_top_of_low_memory());
    mmio_resource(dev, index++, smmrrh, bmbound - smmrrh);

/* The BMBOUND_HI register matches register bits of 31:24 with address