Patch set updated for coreboot: fsp1_1: Don't hide build related options behind HAVE_FSP_BIN

[Stefan Reinauer]

Stefan Reinauer ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12465

-gerrit

commit 7e5746eb9ef0a78918c39b01988fc904329ee797
Author: Stefan Reinauer 
Date:   Wed Nov 18 15:28:19 2015 -0800

fsp1_1: Don't hide build related options behind HAVE_FSP_BIN

The right thing to do is to hide them behind PLATFORM_USES_FSP1_1.
    The only things that should depend on HAVE_FSP_BIN is the code
    that actually adds the file to CBFS, and the path to the file in Kconfig.

Removing the HAVE_FSP_BIN check requires some default values
    for two Kconfig variables.

Change-Id: I9b6c3ed0cdfb0e02421d7b98c488a66e39add947
    Signed-off-by: Stefan Reinauer 
---
 src/drivers/intel/fsp1_1/Kconfig | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig
index 51fa314..43435c7 100644
--- a/src/drivers/intel/fsp1_1/Kconfig
+++ b/src/drivers/intel/fsp1_1/Kconfig
@@ -40,8 +40,6 @@ config HAVE_FSP_BIN
      Note: Without this binary, coreboot builds relying on the FSP
      will not boot

-if HAVE_FSP_BIN
-
 config CPU_MICROCODE_CBFS_LEN
    hex "Microcode update region length in bytes"
    default 0
@@ -62,19 +60,19 @@ config FSP_FILE

config FSP_IMAGE_ID_STRING
    string "8 byte platform string identifying the FSP platform"
+	default "FSPROCKS"
    help
      8 ASCII character byte signature string that will help match the FSP
      binary to a supported hardware configuration.

config FSP_LOC
    hex "Intel FSP Binary location in CBFS"
+	default 0xffee0000
    help
      The location in CBFS that the FSP is located. This must match the
      value that is set in the FSP binary.  If the FSP needs to be moved,
      rebase the FSP with Intel's BCT (tool).

-endif #HAVE_FSP_BIN
-
 config DISPLAY_FAST_BOOT_DATA
    bool "Display fast boot data"
    default n