[S] Change in coreboot[main]: soc/intel/common/gpio: support 16-bit CPU Port ID

[Cliff Huang (Code Review)]

Attention is currently required from: Bora Guvendik, Cliff Huang, Jamie Ryu, Jérémy Compostella, Paul Menzel, Saurabh Mishra, Wonkyu Kim.

Hello Bora Guvendik, Jamie Ryu, Jérémy Compostella, Saurabh Mishra, Subrata Banik, Wonkyu Kim, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/83981?usp=email

to look at the new patch set (#10).

Change subject: soc/intel/common/gpio: support 16-bit CPU Port ID
......................................................................

soc/intel/common/gpio: support 16-bit CPU Port ID

- Add Kconfig: SOC_INTEL_COMMON_BLOCK_GPIO_16BIT_CPU_PORTID.
- Change cpu_port field to 16-bit width if the Kconfig is set.

BUG=none
TEST=boot to OS and use iotools to read the registers that use 16-bit
port ID such as IOM AUX Bias Ctrl register to verify the 16-bit group
ID field. The bit 15:8 of the returned port ID value should be 0xF2
instead of zero.

Signed-off-by: Cliff Huang 
Change-Id: I8c1a48d587bd41178b0c6bb0144fda93e292423d
---
M src/soc/intel/common/block/gpio/Kconfig
M src/soc/intel/common/block/include/intelblocks/gpio.h
2 files changed, 15 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/83981/10