Change in coreboot[master]: mb/intel/adlp: Add support for LPDDR5

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46899 )

Change subject: mb/intel/adlp: Add support for LPDDR5
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Patch Set 12:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46899/12/src/mainboard/intel/adlrvp... 
File src/mainboard/intel/adlrvp/memory.c:

https://review.coreboot.org/c/coreboot/+/46899/12/src/mainboard/intel/adlrvp... 
PS12, Line 62: 	  15, 14, 12, 13,  8,  9, 10, 11 },   /* Byte 1 */
> I’d also remove the comments.
>
> For the record (for myself), it’s an array:
> uint8_t dq_map[DDR_NUM_CHANNELS][BYTES_PER_CHANNEL * BITS_PER_BYTE];

yes, Paul its an array.

we could put 0 and 1 in same line, its more about readability in code