[XL] Change in coreboot[main]: soc/intel/xeon-sp: Hook up public FSP bin and headers

[Shuo Liu (Code Review)]

Attention is currently required from: Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Fabian Meyer, Felix Singer, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Patrick Rudolph, Srinidhi N Kaushik, Tim Chu.

Shuo Liu has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/80360?usp=email )

Change subject: soc/intel/xeon-sp: Hook up public FSP bin and headers
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Patch Set 4:

(1 comment)

Patchset:

PS3:
> Very interesting, this seems related to my findings while porting coreboot 64-bit to ASRock SPC741d8 […]

PcdMigrateTemporaryRamFirmwareVolumes is a feature for UEFI boot guard and not ready to be used with coreboot now. 
When PcdMigrateTemporaryRamFirmwareVolumes = TRUE (as a fixed PCD), FSP-S will enabling paging, more info is from https://github.com/tianocore/tianocore.github.io/wiki/Boot-Guard-TOCTOU-Vuln...

Since https://review.coreboot.org/c/coreboot/+/82705 is not likely to be accepted, I need some more time to move ahead.