Change in coreboot[master]: soc/amd/cezanne,picasso/include/southbridge: fix typo in define

[Felix Held (Code Review)]

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59028 )

Change subject: soc/amd/cezanne,picasso/include/southbridge: fix typo in define
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soc/amd/cezanne,picasso/include/southbridge: fix typo in define

In both the Picasso PPR (rev 3.16) and the Cezanne PPR (rev 3.03) bit 16
of the misc I2C pad control registers is defined as BiasCrtEn, so rename
I2C_PAD_CTRL_BIOS_CRT_EN to I2C_PAD_CTRL_BIAS_CRT_EN.

Signed-off-by: Felix Held 
Change-Id: If39ac17a433cb90c944fdde038cd246a995e193a
---
M src/soc/amd/cezanne/include/soc/southbridge.h
M src/soc/amd/picasso/include/soc/southbridge.h
2 files changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/59028/1

diff --git a/src/soc/amd/cezanne/include/soc/southbridge.h b/src/soc/amd/cezanne/include/soc/southbridge.h
index addb850..1e3697b 100644
--- a/src/soc/amd/cezanne/include/soc/southbridge.h
+++ b/src/soc/amd/cezanne/include/soc/southbridge.h
@@ -118,7 +118,7 @@
 #define   I2C_PAD_CTRL_CAP_UP		BIT(13)
 #define   I2C_PAD_CTRL_RES_DOWN		BIT(14)
 #define   I2C_PAD_CTRL_RES_UP		BIT(15)
-#define   I2C_PAD_CTRL_BIOS_CRT_EN	BIT(16)
+#define   I2C_PAD_CTRL_BIAS_CRT_EN	BIT(16)
 #define   I2C_PAD_CTRL_SPARE0		BIT(17)
 #define   I2C_PAD_CTRL_SPARE1		BIT(18)

diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index f547f86..300f458 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -115,7 +115,7 @@
 #define   I2C_PAD_CTRL_CAP_UP		BIT(13)
 #define   I2C_PAD_CTRL_RES_DOWN		BIT(14)
 #define   I2C_PAD_CTRL_RES_UP		BIT(15)
-#define   I2C_PAD_CTRL_BIOS_CRT_EN	BIT(16)
+#define   I2C_PAD_CTRL_BIAS_CRT_EN	BIT(16)
 #define   I2C_PAD_CTRL_SPARE0		BIT(17)
 #define   I2C_PAD_CTRL_SPARE1		BIT(18)