build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29968 )
Change subject: qcs405: Add blsp spi driver and enable SPI-NOR ......................................................................
Patch Set 2:
(95 comments)
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/clock.c File src/soc/qualcomm/qcs405/clock.c:
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/clock.c@206 PS2, Line 206: clock_enable_vote(REG(GCC_BLSP1_AHB_CBCR), code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/clock.c@206 PS2, Line 206: clock_enable_vote(REG(GCC_BLSP1_AHB_CBCR), please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/clock.c@207 PS2, Line 207: REG(GCC_APCS_CLOCK_BRANCH_ENA_VOTE), code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/clock.c@207 PS2, Line 207: REG(GCC_APCS_CLOCK_BRANCH_ENA_VOTE), please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/clock.c@208 PS2, Line 208: BLSP2_AHB_CLK_ENA); code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/clock.c@208 PS2, Line 208: BLSP2_AHB_CLK_ENA); please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/include/soc/... File src/soc/qualcomm/qcs405/include/soc/qup.h:
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/include/soc/... PS2, Line 161: unsigned clk_frequency; Prefer 'unsigned int' to bare use of 'unsigned'
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/include/soc/... PS2, Line 162: unsigned src_frequency; Prefer 'unsigned int' to bare use of 'unsigned'
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/include/soc/... PS2, Line 164: unsigned initialized; Prefer 'unsigned int' to bare use of 'unsigned'
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/include/soc/... PS2, Line 173: unsigned data_len; Prefer 'unsigned int' to bare use of 'unsigned'
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/include/soc/... PS2, Line 178: unsigned size; Prefer 'unsigned int' to bare use of 'unsigned'
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c File src/soc/qualcomm/qcs405/spi.c:
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@63 PS2, Line 63: {0},{0},{0},{0}, space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@63 PS2, Line 63: {0},{0},{0},{0}, space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@63 PS2, Line 63: {0},{0},{0},{0}, space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@64 PS2, Line 64: /* BLSP5 registers for SPI interface */ code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@65 PS2, Line 65: { code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@65 PS2, Line 65: { please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@66 PS2, Line 66: BLSP5_SPI_CONFIG_REG, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@66 PS2, Line 66: BLSP5_SPI_CONFIG_REG, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@67 PS2, Line 67: BLSP5_SPI_IO_CONTROL_REG, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@67 PS2, Line 67: BLSP5_SPI_IO_CONTROL_REG, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@68 PS2, Line 68: BLSP5_SPI_ERROR_FLAGS_REG, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@68 PS2, Line 68: BLSP5_SPI_ERROR_FLAGS_REG, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@69 PS2, Line 69: BLSP5_SPI_ERROR_FLAGS_EN_REG, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@69 PS2, Line 69: BLSP5_SPI_ERROR_FLAGS_EN_REG, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@70 PS2, Line 70: BLSP5_QUP_CONFIG_REG, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@70 PS2, Line 70: BLSP5_QUP_CONFIG_REG, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@71 PS2, Line 71: BLSP5_QUP_ERROR_FLAGS_REG, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@71 PS2, Line 71: BLSP5_QUP_ERROR_FLAGS_REG, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@72 PS2, Line 72: BLSP5_QUP_ERROR_FLAGS_EN_REG, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@72 PS2, Line 72: BLSP5_QUP_ERROR_FLAGS_EN_REG, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@73 PS2, Line 73: BLSP5_QUP_OPERATIONAL_REG, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@73 PS2, Line 73: BLSP5_QUP_OPERATIONAL_REG, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@74 PS2, Line 74: BLSP5_QUP_IO_MODES_REG, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@74 PS2, Line 74: BLSP5_QUP_IO_MODES_REG, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@75 PS2, Line 75: BLSP5_QUP_STATE_REG, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@75 PS2, Line 75: BLSP5_QUP_STATE_REG, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@76 PS2, Line 76: BLSP5_QUP_INPUT_FIFOc_REG(0), code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@76 PS2, Line 76: BLSP5_QUP_INPUT_FIFOc_REG(0), please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@77 PS2, Line 77: BLSP5_QUP_OUTPUT_FIFOc_REG(0), code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@77 PS2, Line 77: BLSP5_QUP_OUTPUT_FIFOc_REG(0), please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@78 PS2, Line 78: BLSP5_QUP_MX_INPUT_COUNT_REG, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@78 PS2, Line 78: BLSP5_QUP_MX_INPUT_COUNT_REG, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@79 PS2, Line 79: BLSP5_QUP_MX_OUTPUT_COUNT_REG, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@79 PS2, Line 79: BLSP5_QUP_MX_OUTPUT_COUNT_REG, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@80 PS2, Line 80: BLSP5_QUP_SW_RESET_REG, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@80 PS2, Line 80: BLSP5_QUP_SW_RESET_REG, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@81 PS2, Line 81: 0, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@81 PS2, Line 81: 0, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@82 PS2, Line 82: 0, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@82 PS2, Line 82: 0, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@83 PS2, Line 83: BLSP5_QUP_OPERATIONAL_MASK, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@83 PS2, Line 83: BLSP5_QUP_OPERATIONAL_MASK, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@84 PS2, Line 84: BLSP5_SPI_DEASSERT_WAIT_REG, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@84 PS2, Line 84: BLSP5_SPI_DEASSERT_WAIT_REG, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@85 PS2, Line 85: }, code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@85 PS2, Line 85: }, please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@273 PS2, Line 273: SPI_IO_CTRL_NO_TRI_STATE | SPI_IO_CTRL_MX_CS_MODE); line over 80 characters
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@310 PS2, Line 310: switch(slave->bus) { switch and case should be at the same indent
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@310 PS2, Line 310: switch(slave->bus) { space required before the open parenthesis '('
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@311 PS2, Line 311: case 5: code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@311 PS2, Line 311: case 5: please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@313 PS2, Line 313: gpio_configure(GPIO(26), 3, GPIO_NO_PULL, GPIO_16MA, GPIO_INPUT); line over 80 characters
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@313 PS2, Line 313: gpio_configure(GPIO(26), 3, GPIO_NO_PULL, GPIO_16MA, GPIO_INPUT); code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@313 PS2, Line 313: gpio_configure(GPIO(26), 3, GPIO_NO_PULL, GPIO_16MA, GPIO_INPUT); please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@314 PS2, Line 314: gpio_configure(GPIO(27), 3, GPIO_NO_PULL, GPIO_16MA, GPIO_INPUT); line over 80 characters
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@314 PS2, Line 314: gpio_configure(GPIO(27), 3, GPIO_NO_PULL, GPIO_16MA, GPIO_INPUT); code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@314 PS2, Line 314: gpio_configure(GPIO(27), 3, GPIO_NO_PULL, GPIO_16MA, GPIO_INPUT); please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@315 PS2, Line 315: gpio_configure(GPIO(28), 4, GPIO_PULL_UP, GPIO_16MA, GPIO_INPUT); line over 80 characters
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@315 PS2, Line 315: gpio_configure(GPIO(28), 4, GPIO_PULL_UP, GPIO_16MA, GPIO_INPUT); code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@315 PS2, Line 315: gpio_configure(GPIO(28), 4, GPIO_PULL_UP, GPIO_16MA, GPIO_INPUT); please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@316 PS2, Line 316: gpio_configure(GPIO(29), 4, GPIO_NO_PULL, GPIO_16MA, GPIO_INPUT); line over 80 characters
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@316 PS2, Line 316: gpio_configure(GPIO(29), 4, GPIO_NO_PULL, GPIO_16MA, GPIO_INPUT); code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@316 PS2, Line 316: gpio_configure(GPIO(29), 4, GPIO_NO_PULL, GPIO_16MA, GPIO_INPUT); please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@318 PS2, Line 318: break; code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@318 PS2, Line 318: break; please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@319 PS2, Line 319: default: code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@320 PS2, Line 320: printk(BIOS_ERR, "SPI error: unsupported bus %d (Supported busses 0, 1, 2, 3, 4, 5) ", slave->bus); line over 80 characters
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@320 PS2, Line 320: printk(BIOS_ERR, "SPI error: unsupported bus %d (Supported busses 0, 1, 2, 3, 4, 5) ", slave->bus); code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@320 PS2, Line 320: printk(BIOS_ERR, "SPI error: unsupported bus %d (Supported busses 0, 1, 2, 3, 4, 5) ", slave->bus); please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@321 PS2, Line 321: break; code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@321 PS2, Line 321: break; please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@322 PS2, Line 322: } code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@322 PS2, Line 322: } please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@354 PS2, Line 354: } void function return statements are not generally useful
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@428 PS2, Line 428: } void function return statements are not generally useful
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@684 PS2, Line 684: "or chipselect\n", bus); code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@684 PS2, Line 684: "or chipselect\n", bus); please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@713 PS2, Line 713: static int xfer_vectors(const struct spi_slave *slave, open brace '{' following function definitions go on the next line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@714 PS2, Line 714: struct spi_op vectors[], size_t count) code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@714 PS2, Line 714: struct spi_op vectors[], size_t count) please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@715 PS2, Line 715: { please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@716 PS2, Line 716: return spi_flash_vector_helper(slave, vectors, count, spi_ctrlr_xfer); code indent should use tabs where possible
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@716 PS2, Line 716: return spi_flash_vector_helper(slave, vectors, count, spi_ctrlr_xfer); please, no spaces at the start of a line
https://review.coreboot.org/#/c/29968/2/src/soc/qualcomm/qcs405/spi.c@717 PS2, Line 717: } please, no spaces at the start of a line
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