Change in coreboot[master]: soc/intel/alderlake: Fix value of SA_DEVFN_CPU_PCIE1_0

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59981 )

Change subject: soc/intel/alderlake: Fix value of SA_DEVFN_CPU_PCIE1_0
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soc/intel/alderlake: Fix value of SA_DEVFN_CPU_PCIE1_0

The macro was defined using PCH_DEV_SLOT_CPU_1, which doesn't exist,
so replace it with the correct value of SA_DEV_SLOT_CPU_1.

Change-Id: If6d294d681907c51ac5678c9251364d4d6df4329
Signed-off-by: Tim Wawrzynczak 
---
M src/soc/intel/alderlake/include/soc/pci_devs.h
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/59981/1

diff --git a/src/soc/intel/alderlake/include/soc/pci_devs.h b/src/soc/intel/alderlake/include/soc/pci_devs.h
index 1729160..956a021 100644
--- a/src/soc/intel/alderlake/include/soc/pci_devs.h
+++ b/src/soc/intel/alderlake/include/soc/pci_devs.h
@@ -26,7 +26,7 @@
 #endif

#define SA_DEV_SLOT_CPU_1	0x01
-#define  SA_DEVFN_CPU_PCIE1_0	PCI_DEVFN(PCH_DEV_SLOT_CPU_1, 0)
+#define  SA_DEVFN_CPU_PCIE1_0	PCI_DEVFN(SA_DEV_SLOT_CPU_1, 0)

#define SA_DEV_SLOT_IGD		0x02
 #define  SA_DEVFN_IGD		PCI_DEVFN(SA_DEV_SLOT_IGD, 0)