Aaron Durbin (adurbin@chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17648
-gerrit
commit 3ccc037a50a41949a9dde6d2fca5bf4fd280f65c Author: Aaron Durbin adurbin@chromium.org Date: Tue Nov 29 21:37:42 2016 -0600
lib: put romstage_handoff implementation in own compilation unit
Instead of putting all the functions inline just put the current implementation into a C file. That way all the implementation innards are not exposed.
Lastly, fix up the fallout of compilation units not including the headers they actually use.
Change-Id: I01fd25d158c0d5016405b73a4d4df3721c281b04 Signed-off-by: Aaron Durbin adurbin@chromium.org --- src/drivers/intel/fsp1_1/romstage.c | 1 + src/include/romstage_handoff.h | 74 +------------------- src/lib/Makefile.inc | 3 + src/lib/romstage_handoff.c | 80 ++++++++++++++++++++++ src/mainboard/google/gru/romstage.c | 2 + src/soc/intel/baytrail/romstage/romstage.c | 1 + src/soc/intel/braswell/romstage/romstage.c | 1 + src/soc/intel/fsp_broadwell_de/romstage/romstage.c | 1 + 8 files changed, 91 insertions(+), 72 deletions(-)
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index b222082..bb3e96c 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -34,6 +34,7 @@ #include <smbios.h> #include <soc/intel/common/mrc_cache.h> #include <stage_cache.h> +#include <string.h> #include <timestamp.h> #include <tpm.h> #include <vendorcode/google/chromeos/chromeos.h> diff --git a/src/include/romstage_handoff.h b/src/include/romstage_handoff.h index 9e254cd..1a6bbf7 100644 --- a/src/include/romstage_handoff.h +++ b/src/include/romstage_handoff.h @@ -15,80 +15,10 @@ #ifndef ROMSTAGE_HANDOFF_H #define ROMSTAGE_HANDOFF_H
-#include <stdint.h> -#include <string.h> -#include <cbmem.h> -#include <console/console.h> -#include <rules.h> - -/* It is the chipset's responsibility for maintaining the integrity of this - * structure in CBMEM. For instance, if chipset code adds this structure - * using the CBMEM_ID_ROMSTAGE_INFO id it needs to ensure it doesn't clobber - * fields it doesn't own. */ -struct romstage_handoff { - /* Indicate if the current boot is an S3 resume. If - * CONFIG_RELOCTABLE_RAMSTAGE is enabled the chipset code is - * responsible for initializing this variable. Otherwise, ramstage - * will be re-loaded from cbfs (which can be slower since it lives - * in flash). */ - uint8_t s3_resume; - uint8_t reboot_required; - uint8_t reserved[2]; -}; - -/* The romstage_handoff_find_or_add() function provides the necessary logic - * for initializing the romstage_handoff structure in cbmem. Different components - * of the romstage may be responsible for setting up different fields. Therefore - * that same logic flow should be used for allocating and initializing the - * structure. A newly allocated structure will be memset to 0. */ -static inline struct romstage_handoff *romstage_handoff_find_or_add(void) -{ - struct romstage_handoff *handoff; - - /* cbmem_add() first does a find and uses the old location before the - * real add. However, it is important to know when the structure is not - * found so it can be initialized to 0. */ - handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); - - if (handoff) - return handoff; - - handoff = cbmem_add(CBMEM_ID_ROMSTAGE_INFO, sizeof(*handoff)); - - if (handoff != NULL) - memset(handoff, 0, sizeof(*handoff)); - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); - - return handoff; -} - /* Returns 0 if initialized. Else < 0 if handoff structure not added. */ -static inline int romstage_handoff_init(int is_s3_resume) -{ - struct romstage_handoff *handoff; - - handoff = romstage_handoff_find_or_add(); - - if (handoff == NULL) - return -1; - - handoff->s3_resume = is_s3_resume; - - return 0; -} +int romstage_handoff_init(int is_s3_resume);
/* Return 1 if resuming or 0 if not. */ -static inline int romstage_handoff_is_resume(void) -{ - struct romstage_handoff *handoff; - - handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); - - if (handoff == NULL) - return 0; - - return handoff->s3_resume; -} +int romstage_handoff_is_resume(void);
#endif /* ROMSTAGE_HANDOFF_H */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index ddade2b..4157091 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -87,6 +87,8 @@ romstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c ramstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c romstage-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c +ramstage-y += romstage_handoff.c +romstage-y += romstage_handoff.c romstage-y += romstage_stack.c ramstage-y += romstage_stack.c romstage-y += stack.c @@ -153,6 +155,7 @@ postcar-y += cbmem_common.c postcar-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c postcar-y += imd_cbmem.c postcar-y += imd.c +postcar-y += romstage_handoff.c
bootblock-y += hexdump.c ramstage-y += hexdump.c diff --git a/src/lib/romstage_handoff.c b/src/lib/romstage_handoff.c new file mode 100644 index 0000000..bdfdb64 --- /dev/null +++ b/src/lib/romstage_handoff.c @@ -0,0 +1,80 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <string.h> +#include <cbmem.h> +#include <console/console.h> +#include <romstage_handoff.h> +#include <rules.h> + +struct romstage_handoff { + /* Indicate if the current boot is an S3 resume. If + * CONFIG_RELOCTABLE_RAMSTAGE is enabled the chipset code is + * responsible for initializing this variable. Otherwise, ramstage + * will be re-loaded from cbfs (which can be slower since it lives + * in flash). */ + uint8_t s3_resume; + uint8_t reboot_required; + uint8_t reserved[2]; +}; + +static struct romstage_handoff *romstage_handoff_find_or_add(void) +{ + struct romstage_handoff *handoff; + + /* cbmem_add() first does a find and uses the old location before the + * real add. However, it is important to know when the structure is not + * found so it can be initialized to 0. */ + handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); + + if (handoff) + return handoff; + + handoff = cbmem_add(CBMEM_ID_ROMSTAGE_INFO, sizeof(*handoff)); + + if (handoff != NULL) + memset(handoff, 0, sizeof(*handoff)); + else + printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + + return handoff; +} + +int romstage_handoff_init(int is_s3_resume) +{ + struct romstage_handoff *handoff; + + handoff = romstage_handoff_find_or_add(); + + if (handoff == NULL) + return -1; + + handoff->s3_resume = is_s3_resume; + + return 0; +} + +int romstage_handoff_is_resume(void) +{ + struct romstage_handoff *handoff; + + handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); + + if (handoff == NULL) + return 0; + + return handoff->s3_resume; +} diff --git a/src/mainboard/google/gru/romstage.c b/src/mainboard/google/gru/romstage.c index 1e2507a..55ed79a 100644 --- a/src/mainboard/google/gru/romstage.c +++ b/src/mainboard/google/gru/romstage.c @@ -19,6 +19,7 @@ #include <arch/exception.h> #include <arch/mmu.h> #include <cbfs.h> +#include <cbmem.h> #include <console/console.h> #include <program_loading.h> #include <romstage_handoff.h> @@ -28,6 +29,7 @@ #include <soc/sdram.h> #include <symbols.h> #include <soc/usb.h> +#include <stdlib.h>
#include "pwm_regulator.h"
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index 124eb6e..d457151 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -28,6 +28,7 @@ #include <program_loading.h> #include <romstage_handoff.h> #include <stage_cache.h> +#include <string.h> #include <timestamp.h> #include <tpm.h> #include <vendorcode/google/chromeos/chromeos.h> diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index 95880e8..0125847 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -29,6 +29,7 @@ #include <device/pci_def.h> #include <elog.h> #include <romstage_handoff.h> +#include <string.h> #include <timestamp.h> #include <reset.h> #include <vendorcode/google/chromeos/chromeos.h> diff --git a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c index 49bdedb..49d9a94 100644 --- a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c +++ b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c @@ -19,6 +19,7 @@ #include <lib.h> #include <arch/io.h> #include <arch/cbfs.h> +#include <cbmem.h> #include <console/console.h> #include <cpu/x86/mtrr.h> #include <program_loading.h>