Gaggery Tsai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37536 )
Change subject: soc/intel/common: Add PCI device IDs for CMP-H ......................................................................
soc/intel/common: Add PCI device IDs for CMP-H
This patch adds PCI device IDs for CMP-H.
TEST=build coreboot.rom and boot to the OS
Change-Id: Ia7413f75757c64b389a39d6e171f88eb61036c58 Signed-off-by: Gaggery Tsai gaggery.tsai@intel.com --- M src/include/device/pci_ids.h M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/dsp/dsp.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/hda/hda.c M src/soc/intel/common/block/i2c/i2c.c M src/soc/intel/common/block/p2sb/p2sb.c M src/soc/intel/common/block/pcie/pcie.c M src/soc/intel/common/block/pmc/pmc.c M src/soc/intel/common/block/sata/sata.c M src/soc/intel/common/block/scs/sd.c M src/soc/intel/common/block/smbus/smbus.c M src/soc/intel/common/block/spi/spi.c M src/soc/intel/common/block/sram/sram.c M src/soc/intel/common/block/uart/uart.c M src/soc/intel/common/block/xdci/xdci.c M src/soc/intel/common/block/xhci/xhci.c 17 files changed, 101 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/37536/1
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index b75e596..094541c 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2928,6 +2928,7 @@ #define PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP14 0x9db5 #define PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP15 0x9db6 #define PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP16 0x9db7 + #define PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP1 0x34b8 #define PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP2 0x34b9 #define PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP3 0x34ba @@ -3004,6 +3005,31 @@ #define PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP15 0x02b6 #define PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP16 0x02b7
+#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP1 0x06b8 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP2 0x06b9 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP3 0x06ba +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP4 0x06bb +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP5 0x06bc +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP6 0x06bd +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP7 0x06be +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP8 0x06bf +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP9 0x06b0 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP10 0x06b1 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP11 0x06b2 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP12 0x06b3 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP13 0x06b4 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP14 0x06b5 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP15 0x06b6 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP16 0x06b7 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP17 0x06c0 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP18 0x06c1 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP19 0x06c2 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP20 0x06c3 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP21 0x06ac +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP22 0x06ad +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP23 0x06ae +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP24 0x06af + /* Intel SATA device Ids */ #define PCI_DEVICE_ID_INTEL_SPT_U_SATA 0x9d03 #define PCI_DEVICE_ID_INTEL_SPT_U_Y_PREMIUM_SATA 0x9d07 @@ -3031,6 +3057,9 @@ #define PCI_DEVICE_ID_INTEL_CMP_SATA 0x02d5 #define PCI_DEVICE_ID_INTEL_CMP_PREMIUM_SATA 0x02d7 #define PCI_DEVICE_ID_INTEL_CMP_LP_SATA 0x02d3 +#define PCI_DEVICE_ID_INTEL_CMP_H_SATA 0x06d2 +#define PCI_DEVICE_ID_INTEL_CMP_H_HALO_SATA 0x06d3 +#define PCI_DEVICE_ID_INTEL_CMP_H_PREMIUM_SATA 0x06d7 #define PCI_DEVICE_ID_INTEL_TGP_LP_SATA 0xa0d3 #define PCI_DEVICE_ID_INTEL_TGP_SATA 0xa0d5 #define PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA 0xa0d7 @@ -3048,6 +3077,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_PMC 0xa321 #define PCI_DEVICE_ID_INTEL_ICP_PMC 0x34a1 #define PCI_DEVICE_ID_INTEL_CMP_PMC 0x02a1 +#define PCI_DEVICE_ID_INTEL_CMP_H_PMC 0x06a1 #define PCI_DEVICE_ID_INTEL_TGP_PMC 0xa0a1
/* Intel I2C device Ids */ @@ -3099,6 +3129,10 @@ #define PCI_DEVICE_ID_INTEL_CMP_I2C3 0x02eb #define PCI_DEVICE_ID_INTEL_CMP_I2C4 0x02c5 #define PCI_DEVICE_ID_INTEL_CMP_I2C5 0x02c6 +#define PCI_DEVICE_ID_INTEL_CMP_H_I2C0 0x06e8 +#define PCI_DEVICE_ID_INTEL_CMP_H_I2C1 0x06e9 +#define PCI_DEVICE_ID_INTEL_CMP_H_I2C2 0x06ea +#define PCI_DEVICE_ID_INTEL_CMP_H_I2C3 0x06eb #define PCI_DEVICE_ID_INTEL_TGP_I2C0 0xa0e8 #define PCI_DEVICE_ID_INTEL_TGP_I2C1 0xa0e9 #define PCI_DEVICE_ID_INTEL_TGP_I2C2 0xa0ea @@ -3138,6 +3172,9 @@ #define PCI_DEVICE_ID_INTEL_CMP_UART0 0x02a8 #define PCI_DEVICE_ID_INTEL_CMP_UART1 0x02a9 #define PCI_DEVICE_ID_INTEL_CMP_UART2 0x02c7 +#define PCI_DEVICE_ID_INTEL_CMP_H_UART0 0x06a8 +#define PCI_DEVICE_ID_INTEL_CMP_H_UART1 0x06a9 +#define PCI_DEVICE_ID_INTEL_CMP_H_UART2 0x06c7 #define PCI_DEVICE_ID_INTEL_TGP_UART0 0xa0a8 #define PCI_DEVICE_ID_INTEL_TGP_UART1 0xa0a9 #define PCI_DEVICE_ID_INTEL_TGP_UART2 0xa0c7 @@ -3171,6 +3208,10 @@ #define PCI_DEVICE_ID_INTEL_CMP_SPI1 0x02ab #define PCI_DEVICE_ID_INTEL_CMP_SPI2 0x02fb #define PCI_DEVICE_ID_INTEL_CMP_HWSEQ_SPI 0x02a4 +#define PCI_DEVICE_ID_INTEL_CMP_H_SPI0 0x06aa +#define PCI_DEVICE_ID_INTEL_CMP_H_SPI1 0x06ab +#define PCI_DEVICE_ID_INTEL_CMP_H_SPI2 0x06fb +#define PCI_DEVICE_ID_INTEL_CMP_H_HWSEQ_SPI 0x06a4 #define PCI_DEVICE_ID_INTEL_TGP_SPI0 0xa0a4 #define PCI_DEVICE_ID_INTEL_TGP_GSPI0 0xa0aa #define PCI_DEVICE_ID_INTEL_TGP_GSPI1 0xa0ab @@ -3347,6 +3388,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_SMBUS 0xa323 #define PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS 0x34a3 #define PCI_DEVICE_ID_INTEL_CMP_SMBUS 0x02a3 +#define PCI_DEVICE_ID_INTEL_CMP_H_SMBUS 0x06a3 #define PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS 0xa0a3
/* Intel XHCI device Ids */ @@ -3361,6 +3403,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_XHCI 0xa36d #define PCI_DEVICE_ID_INTEL_ICP_LP_XHCI 0x34ed #define PCI_DEVICE_ID_INTEL_CMP_LP_XHCI 0x02ed +#define PCI_DEVICE_ID_INTEL_CMP_H_XHCI 0x06ed #define PCI_DEVICE_ID_INTEL_TGP_LP_XHCI 0xa0ed
/* Intel P2SB device Ids */ @@ -3375,6 +3418,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_P2SB 0xa320 #define PCI_DEVICE_ID_INTEL_ICL_P2SB 0x34a0 #define PCI_DEVICE_ID_INTEL_CMP_P2SB 0x02a0 +#define PCI_DEVICE_ID_INTEL_CMP_H_P2SB 0x06a0 #define PCI_DEVICE_ID_INTEL_TGL_P2SB 0xa0a0
/* Intel SRAM device Ids */ @@ -3384,6 +3428,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_SRAM 0xa36f #define PCI_DEVICE_ID_INTEL_ICL_SRAM 0x34ef #define PCI_DEVICE_ID_INTEL_CMP_SRAM 0x02ef +#define PCI_DEVICE_ID_INTEL_CMP_H_SRAM 0x06ef #define PCI_DEVICE_ID_INTEL_TGL_SRAM 0xa0ef
/* Intel AUDIO device Ids */ @@ -3398,6 +3443,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_AUDIO 0xa348 #define PCI_DEVICE_ID_INTEL_ICL_AUDIO 0x34c8 #define PCI_DEVICE_ID_INTEL_CMP_AUDIO 0x02c8 +#define PCI_DEVICE_ID_INTEL_CMP_H_AUDIO 0x06c8 #define PCI_DEVICE_ID_INTEL_BSW_AUDIO 0x2284 #define PCI_DEVICE_ID_INTEL_TGL_AUDIO 0xa0c8
@@ -3415,6 +3461,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_CSE0 0xa360 #define PCI_DEVICE_ID_INTEL_ICL_CSE0 0x34e0 #define PCI_DEVICE_ID_INTEL_CMP_CSE0 0x02e0 +#define PCI_DEVICE_ID_INTEL_CMP_H_CSE0 0x06e0 #define PCI_DEVICE_ID_INTEL_TGL_CSE0 0xa0e0
/* Intel XDCI device Ids */ @@ -3425,6 +3472,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_XDCI 0xa36e #define PCI_DEVICE_ID_INTEL_ICP_LP_XDCI 0x34ee #define PCI_DEVICE_ID_INTEL_CMP_LP_XDCI 0x02ee +#define PCI_DEVICE_ID_INTEL_CMP_H_XDCI 0x06ee #define PCI_DEVICE_ID_INTEL_TGP_LP_XDCI 0xa0ee
/* Intel SD device Ids */ @@ -3435,6 +3483,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_SD 0xa375 #define PCI_DEVICE_ID_INTEL_ICL_SD 0x34f8 #define PCI_DEVICE_ID_INTEL_CMP_SD 0x02f5 +#define PCI_DEVICE_ID_INTEL_CMP_H_SD 0x06f5
/* Intel EMMC device Ids */ #define PCI_DEVICE_ID_INTEL_SKL_EMMC 0x9d2b diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index 011916d..da1b07e 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -754,6 +754,7 @@ PCI_DEVICE_ID_INTEL_CNP_H_CSE0, PCI_DEVICE_ID_INTEL_ICL_CSE0, PCI_DEVICE_ID_INTEL_CMP_CSE0, + PCI_DEVICE_ID_INTEL_CMP_H_CSE0, PCI_DEVICE_ID_INTEL_TGL_CSE0, 0, }; diff --git a/src/soc/intel/common/block/dsp/dsp.c b/src/soc/intel/common/block/dsp/dsp.c index 947c002..51a216ea 100644 --- a/src/soc/intel/common/block/dsp/dsp.c +++ b/src/soc/intel/common/block/dsp/dsp.c @@ -33,6 +33,7 @@ PCI_DEVICE_ID_INTEL_SKL_AUDIO, PCI_DEVICE_ID_INTEL_CNP_H_AUDIO, PCI_DEVICE_ID_INTEL_CMP_AUDIO, + PCI_DEVICE_ID_INTEL_CMP_H_AUDIO, PCI_DEVICE_ID_INTEL_ICL_AUDIO, PCI_DEVICE_ID_INTEL_TGL_AUDIO, 0, diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index e91e0af..edc88ff 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -208,6 +208,10 @@ PCI_DEVICE_ID_INTEL_CML_GT1_H_2, PCI_DEVICE_ID_INTEL_CML_GT2_H_1, PCI_DEVICE_ID_INTEL_CML_GT2_H_2, + PCI_DEVICE_ID_INTEL_CML_GT2_S_G0, + PCI_DEVICE_ID_INTEL_CML_GT2_S_P0, + PCI_DEVICE_ID_INTEL_CML_GT2_H_R0, + PCI_DEVICE_ID_INTEL_CML_GT2_H_R1, PCI_DEVICE_ID_INTEL_TGL_GT0, PCI_DEVICE_ID_INTEL_TGL_GT2_ULT, PCI_DEVICE_ID_INTEL_TGL_GT2_ULX, diff --git a/src/soc/intel/common/block/hda/hda.c b/src/soc/intel/common/block/hda/hda.c index 4a87e1a..12aa105 100644 --- a/src/soc/intel/common/block/hda/hda.c +++ b/src/soc/intel/common/block/hda/hda.c @@ -81,6 +81,7 @@ PCI_DEVICE_ID_INTEL_CNP_H_AUDIO, PCI_DEVICE_ID_INTEL_ICL_AUDIO, PCI_DEVICE_ID_INTEL_CMP_AUDIO, + PCI_DEVICE_ID_INTEL_CMP_H_AUDIO, PCI_DEVICE_ID_INTEL_BSW_AUDIO, PCI_DEVICE_ID_INTEL_TGL_AUDIO, 0 diff --git a/src/soc/intel/common/block/i2c/i2c.c b/src/soc/intel/common/block/i2c/i2c.c index 1749bf5..3a6d4ae 100644 --- a/src/soc/intel/common/block/i2c/i2c.c +++ b/src/soc/intel/common/block/i2c/i2c.c @@ -235,6 +235,10 @@ PCI_DEVICE_ID_INTEL_CMP_I2C3, PCI_DEVICE_ID_INTEL_CMP_I2C4, PCI_DEVICE_ID_INTEL_CMP_I2C5, + PCI_DEVICE_ID_INTEL_CMP_H_I2C0, + PCI_DEVICE_ID_INTEL_CMP_H_I2C1, + PCI_DEVICE_ID_INTEL_CMP_H_I2C2, + PCI_DEVICE_ID_INTEL_CMP_H_I2C3, PCI_DEVICE_ID_INTEL_TGP_I2C0, PCI_DEVICE_ID_INTEL_TGP_I2C1, PCI_DEVICE_ID_INTEL_TGP_I2C2, diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c index 981ad07..7e38458 100644 --- a/src/soc/intel/common/block/p2sb/p2sb.c +++ b/src/soc/intel/common/block/p2sb/p2sb.c @@ -179,6 +179,7 @@ PCI_DEVICE_ID_INTEL_CNP_H_P2SB, PCI_DEVICE_ID_INTEL_ICL_P2SB, PCI_DEVICE_ID_INTEL_CMP_P2SB, + PCI_DEVICE_ID_INTEL_CMP_H_P2SB, PCI_DEVICE_ID_INTEL_TGL_P2SB, 0, }; diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c index 406a227..b73aa8d 100644 --- a/src/soc/intel/common/block/pcie/pcie.c +++ b/src/soc/intel/common/block/pcie/pcie.c @@ -250,6 +250,30 @@ PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP14, PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP15, PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP16, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP1, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP2, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP3, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP4, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP5, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP6, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP7, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP8, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP9, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP10, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP11, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP12, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP13, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP14, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP15, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP16, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP17, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP18, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP19, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP20, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP21, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP22, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP23, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP24, PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP1, PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP2, PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP3, diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c index 1d2aa61..bb87ae1 100644 --- a/src/soc/intel/common/block/pmc/pmc.c +++ b/src/soc/intel/common/block/pmc/pmc.c @@ -133,6 +133,7 @@ PCI_DEVICE_ID_INTEL_CNP_H_PMC, PCI_DEVICE_ID_INTEL_ICP_PMC, PCI_DEVICE_ID_INTEL_CMP_PMC, + PCI_DEVICE_ID_INTEL_CMP_H_PMC, PCI_DEVICE_ID_INTEL_TGP_PMC, 0 }; diff --git a/src/soc/intel/common/block/sata/sata.c b/src/soc/intel/common/block/sata/sata.c index 13ac32e..d2e2d2d 100644 --- a/src/soc/intel/common/block/sata/sata.c +++ b/src/soc/intel/common/block/sata/sata.c @@ -96,6 +96,9 @@ PCI_DEVICE_ID_INTEL_CMP_SATA, PCI_DEVICE_ID_INTEL_CMP_PREMIUM_SATA, PCI_DEVICE_ID_INTEL_CMP_LP_SATA, + PCI_DEVICE_ID_INTEL_CMP_H_SATA, + PCI_DEVICE_ID_INTEL_CMP_H_HALO_SATA, + PCI_DEVICE_ID_INTEL_CMP_H_PREMIUM_SATA, PCI_DEVICE_ID_INTEL_TGP_LP_SATA, PCI_DEVICE_ID_INTEL_TGP_SATA, PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA, diff --git a/src/soc/intel/common/block/scs/sd.c b/src/soc/intel/common/block/scs/sd.c index 2794a3b..28925d4 100644 --- a/src/soc/intel/common/block/scs/sd.c +++ b/src/soc/intel/common/block/scs/sd.c @@ -73,6 +73,7 @@ PCI_DEVICE_ID_INTEL_CNP_H_SD, PCI_DEVICE_ID_INTEL_ICL_SD, PCI_DEVICE_ID_INTEL_CMP_SD, + PCI_DEVICE_ID_INTEL_CMP_H_SD, 0 };
diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c index d7114e4..7c970b6 100644 --- a/src/soc/intel/common/block/smbus/smbus.c +++ b/src/soc/intel/common/block/smbus/smbus.c @@ -95,6 +95,7 @@ PCI_DEVICE_ID_INTEL_LWB_SMBUS, PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS, PCI_DEVICE_ID_INTEL_CMP_SMBUS, + PCI_DEVICE_ID_INTEL_CMP_H_SMBUS, PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS, 0 }; diff --git a/src/soc/intel/common/block/spi/spi.c b/src/soc/intel/common/block/spi/spi.c index 3c77cc4..3499af9 100644 --- a/src/soc/intel/common/block/spi/spi.c +++ b/src/soc/intel/common/block/spi/spi.c @@ -81,6 +81,10 @@ PCI_DEVICE_ID_INTEL_CMP_SPI1, PCI_DEVICE_ID_INTEL_CMP_SPI2, PCI_DEVICE_ID_INTEL_CMP_HWSEQ_SPI, + PCI_DEVICE_ID_INTEL_CMP_H_SPI0, + PCI_DEVICE_ID_INTEL_CMP_H_SPI1, + PCI_DEVICE_ID_INTEL_CMP_H_SPI2, + PCI_DEVICE_ID_INTEL_CMP_H_HWSEQ_SPI, PCI_DEVICE_ID_INTEL_TGP_SPI0, PCI_DEVICE_ID_INTEL_TGP_GSPI0, PCI_DEVICE_ID_INTEL_TGP_GSPI1, diff --git a/src/soc/intel/common/block/sram/sram.c b/src/soc/intel/common/block/sram/sram.c index 47ba28f..2be08b6 100644 --- a/src/soc/intel/common/block/sram/sram.c +++ b/src/soc/intel/common/block/sram/sram.c @@ -51,6 +51,7 @@ PCI_DEVICE_ID_INTEL_GLK_SRAM, PCI_DEVICE_ID_INTEL_ICL_SRAM, PCI_DEVICE_ID_INTEL_CMP_SRAM, + PCI_DEVICE_ID_INTEL_CMP_H_SRAM, PCI_DEVICE_ID_INTEL_TGL_SRAM, 0, }; diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index 718eaca..618d200 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -275,6 +275,9 @@ PCI_DEVICE_ID_INTEL_CMP_UART0, PCI_DEVICE_ID_INTEL_CMP_UART1, PCI_DEVICE_ID_INTEL_CMP_UART2, + PCI_DEVICE_ID_INTEL_CMP_H_UART0, + PCI_DEVICE_ID_INTEL_CMP_H_UART1, + PCI_DEVICE_ID_INTEL_CMP_H_UART2, PCI_DEVICE_ID_INTEL_TGP_UART0, PCI_DEVICE_ID_INTEL_TGP_UART1, PCI_DEVICE_ID_INTEL_TGP_UART2, diff --git a/src/soc/intel/common/block/xdci/xdci.c b/src/soc/intel/common/block/xdci/xdci.c index 92f3b15..2296f9f 100644 --- a/src/soc/intel/common/block/xdci/xdci.c +++ b/src/soc/intel/common/block/xdci/xdci.c @@ -43,6 +43,7 @@ PCI_DEVICE_ID_INTEL_CNP_H_XDCI, PCI_DEVICE_ID_INTEL_ICP_LP_XDCI, PCI_DEVICE_ID_INTEL_CMP_LP_XDCI, + PCI_DEVICE_ID_INTEL_CMP_H_XDCI, PCI_DEVICE_ID_INTEL_TGP_LP_XDCI, 0 }; diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c index 5930e23..e02bb2c 100644 --- a/src/soc/intel/common/block/xhci/xhci.c +++ b/src/soc/intel/common/block/xhci/xhci.c @@ -131,6 +131,7 @@ PCI_DEVICE_ID_INTEL_CNP_H_XHCI, PCI_DEVICE_ID_INTEL_ICP_LP_XHCI, PCI_DEVICE_ID_INTEL_CMP_LP_XHCI, + PCI_DEVICE_ID_INTEL_CMP_H_XHCI, PCI_DEVICE_ID_INTEL_TGP_LP_XHCI, 0 };
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37536 )
Change subject: soc/intel/common: Add PCI device IDs for CMP-H ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/37536/1/src/include/device/pci_ids.... File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/37536/1/src/include/device/pci_ids.... PS1, Line 3061: #define PCI_DEVICE_ID_INTEL_CMP_H_HALO_SATA 0x06d3 One tab too much?
Hello Patrick Rudolph, Angel Pons, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37536
to look at the new patch set (#2).
Change subject: soc/intel/common: Add PCI device IDs for CMP-H ......................................................................
soc/intel/common: Add PCI device IDs for CMP-H
This patch adds PCI device IDs for CMP-H.
TEST=build coreboot.rom and boot to the OS
Change-Id: Ia7413f75757c64b389a39d6e171f88eb61036c58 Signed-off-by: Gaggery Tsai gaggery.tsai@intel.com --- M src/include/device/pci_ids.h M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/dsp/dsp.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/hda/hda.c M src/soc/intel/common/block/i2c/i2c.c M src/soc/intel/common/block/p2sb/p2sb.c M src/soc/intel/common/block/pcie/pcie.c M src/soc/intel/common/block/pmc/pmc.c M src/soc/intel/common/block/sata/sata.c M src/soc/intel/common/block/scs/sd.c M src/soc/intel/common/block/smbus/smbus.c M src/soc/intel/common/block/spi/spi.c M src/soc/intel/common/block/sram/sram.c M src/soc/intel/common/block/uart/uart.c M src/soc/intel/common/block/xdci/xdci.c M src/soc/intel/common/block/xhci/xhci.c 17 files changed, 101 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/37536/2
Gaggery Tsai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37536 )
Change subject: soc/intel/common: Add PCI device IDs for CMP-H ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37536/1/src/include/device/pci_ids.... File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/37536/1/src/include/device/pci_ids.... PS1, Line 3061: #define PCI_DEVICE_ID_INTEL_CMP_H_HALO_SATA 0x06d3
One tab too much?
done
Gaggery Tsai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37536 )
Change subject: soc/intel/common: Add PCI device IDs for CMP-H ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37536/1/src/include/device/pci_ids.... File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/37536/1/src/include/device/pci_ids.... PS1, Line 3061: #define PCI_DEVICE_ID_INTEL_CMP_H_HALO_SATA 0x06d3
done
Done
Hello Patrick Rudolph, Subrata Banik, Angel Pons, Balaji Manigandan, Rizwan Qureshi, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37536
to look at the new patch set (#3).
Change subject: soc/intel/common: Add PCI device IDs for CMP-H ......................................................................
soc/intel/common: Add PCI device IDs for CMP-H
This patch adds PCI device IDs for CMP-H.
TEST=build coreboot.rom and boot to the OS
Change-Id: Ia7413f75757c64b389a39d6e171f88eb61036c58 Signed-off-by: Gaggery Tsai gaggery.tsai@intel.com --- M src/include/device/pci_ids.h M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/dsp/dsp.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/hda/hda.c M src/soc/intel/common/block/i2c/i2c.c M src/soc/intel/common/block/p2sb/p2sb.c M src/soc/intel/common/block/pcie/pcie.c M src/soc/intel/common/block/pmc/pmc.c M src/soc/intel/common/block/sata/sata.c M src/soc/intel/common/block/scs/sd.c M src/soc/intel/common/block/smbus/smbus.c M src/soc/intel/common/block/spi/spi.c M src/soc/intel/common/block/sram/sram.c M src/soc/intel/common/block/uart/uart.c M src/soc/intel/common/block/xdci/xdci.c M src/soc/intel/common/block/xhci/xhci.c 17 files changed, 100 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/37536/3
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37536 )
Change subject: soc/intel/common: Add PCI device IDs for CMP-H ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37536 )
Change subject: soc/intel/common: Add PCI device IDs for CMP-H ......................................................................
soc/intel/common: Add PCI device IDs for CMP-H
This patch adds PCI device IDs for CMP-H.
TEST=build coreboot.rom and boot to the OS
Change-Id: Ia7413f75757c64b389a39d6e171f88eb61036c58 Signed-off-by: Gaggery Tsai gaggery.tsai@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/37536 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Duncan Laurie dlaurie@chromium.org --- M src/include/device/pci_ids.h M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/dsp/dsp.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/hda/hda.c M src/soc/intel/common/block/i2c/i2c.c M src/soc/intel/common/block/p2sb/p2sb.c M src/soc/intel/common/block/pcie/pcie.c M src/soc/intel/common/block/pmc/pmc.c M src/soc/intel/common/block/sata/sata.c M src/soc/intel/common/block/scs/sd.c M src/soc/intel/common/block/smbus/smbus.c M src/soc/intel/common/block/spi/spi.c M src/soc/intel/common/block/sram/sram.c M src/soc/intel/common/block/uart/uart.c M src/soc/intel/common/block/xdci/xdci.c M src/soc/intel/common/block/xhci/xhci.c 17 files changed, 100 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Duncan Laurie: Looks good to me, approved
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 43752f8..bd5b3a5 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2930,6 +2930,7 @@ #define PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP14 0x9db5 #define PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP15 0x9db6 #define PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP16 0x9db7 + #define PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP1 0x34b8 #define PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP2 0x34b9 #define PCI_DEVICE_ID_INTEL_ICP_LP_PCIE_RP3 0x34ba @@ -3005,7 +3006,30 @@ #define PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP14 0x02b5 #define PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP15 0x02b6 #define PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP16 0x02b7 - +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP1 0x06b8 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP2 0x06b9 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP3 0x06ba +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP4 0x06bb +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP5 0x06bc +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP6 0x06bd +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP7 0x06be +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP8 0x06bf +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP9 0x06b0 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP10 0x06b1 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP11 0x06b2 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP12 0x06b3 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP13 0x06b4 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP14 0x06b5 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP15 0x06b6 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP16 0x06b7 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP17 0x06c0 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP18 0x06c1 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP19 0x06c2 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP20 0x06c3 +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP21 0x06ac +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP22 0x06ad +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP23 0x06ae +#define PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP24 0x06af #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP1 0x38b8 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP2 0x38b9 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP3 0x38ba @@ -3042,6 +3066,9 @@ #define PCI_DEVICE_ID_INTEL_CMP_SATA 0x02d5 #define PCI_DEVICE_ID_INTEL_CMP_PREMIUM_SATA 0x02d7 #define PCI_DEVICE_ID_INTEL_CMP_LP_SATA 0x02d3 +#define PCI_DEVICE_ID_INTEL_CMP_H_SATA 0x06d2 +#define PCI_DEVICE_ID_INTEL_CMP_H_HALO_SATA 0x06d3 +#define PCI_DEVICE_ID_INTEL_CMP_H_PREMIUM_SATA 0x06d7 #define PCI_DEVICE_ID_INTEL_TGP_LP_SATA 0xa0d3 #define PCI_DEVICE_ID_INTEL_TGP_SATA 0xa0d5 #define PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA 0xa0d7 @@ -3060,6 +3087,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_PMC 0xa321 #define PCI_DEVICE_ID_INTEL_ICP_PMC 0x34a1 #define PCI_DEVICE_ID_INTEL_CMP_PMC 0x02a1 +#define PCI_DEVICE_ID_INTEL_CMP_H_PMC 0x06a1 #define PCI_DEVICE_ID_INTEL_TGP_PMC 0xa0a1 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PMC 0x38a1
@@ -3112,6 +3140,10 @@ #define PCI_DEVICE_ID_INTEL_CMP_I2C3 0x02eb #define PCI_DEVICE_ID_INTEL_CMP_I2C4 0x02c5 #define PCI_DEVICE_ID_INTEL_CMP_I2C5 0x02c6 +#define PCI_DEVICE_ID_INTEL_CMP_H_I2C0 0x06e8 +#define PCI_DEVICE_ID_INTEL_CMP_H_I2C1 0x06e9 +#define PCI_DEVICE_ID_INTEL_CMP_H_I2C2 0x06ea +#define PCI_DEVICE_ID_INTEL_CMP_H_I2C3 0x06eb #define PCI_DEVICE_ID_INTEL_TGP_I2C0 0xa0e8 #define PCI_DEVICE_ID_INTEL_TGP_I2C1 0xa0e9 #define PCI_DEVICE_ID_INTEL_TGP_I2C2 0xa0ea @@ -3158,6 +3190,9 @@ #define PCI_DEVICE_ID_INTEL_CMP_UART0 0x02a8 #define PCI_DEVICE_ID_INTEL_CMP_UART1 0x02a9 #define PCI_DEVICE_ID_INTEL_CMP_UART2 0x02c7 +#define PCI_DEVICE_ID_INTEL_CMP_H_UART0 0x06a8 +#define PCI_DEVICE_ID_INTEL_CMP_H_UART1 0x06a9 +#define PCI_DEVICE_ID_INTEL_CMP_H_UART2 0x06c7 #define PCI_DEVICE_ID_INTEL_TGP_UART0 0xa0a8 #define PCI_DEVICE_ID_INTEL_TGP_UART1 0xa0a9 #define PCI_DEVICE_ID_INTEL_TGP_UART2 0xa0c7 @@ -3195,6 +3230,10 @@ #define PCI_DEVICE_ID_INTEL_CMP_SPI1 0x02ab #define PCI_DEVICE_ID_INTEL_CMP_SPI2 0x02fb #define PCI_DEVICE_ID_INTEL_CMP_HWSEQ_SPI 0x02a4 +#define PCI_DEVICE_ID_INTEL_CMP_H_SPI0 0x06aa +#define PCI_DEVICE_ID_INTEL_CMP_H_SPI1 0x06ab +#define PCI_DEVICE_ID_INTEL_CMP_H_SPI2 0x06fb +#define PCI_DEVICE_ID_INTEL_CMP_H_HWSEQ_SPI 0x06a4 #define PCI_DEVICE_ID_INTEL_TGP_SPI0 0xa0a4 #define PCI_DEVICE_ID_INTEL_TGP_GSPI0 0xa0aa #define PCI_DEVICE_ID_INTEL_TGP_GSPI1 0xa0ab @@ -3379,6 +3418,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_SMBUS 0xa323 #define PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS 0x34a3 #define PCI_DEVICE_ID_INTEL_CMP_SMBUS 0x02a3 +#define PCI_DEVICE_ID_INTEL_CMP_H_SMBUS 0x06a3 #define PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS 0xa0a3 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SMBUS 0x38a3
@@ -3394,6 +3434,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_XHCI 0xa36d #define PCI_DEVICE_ID_INTEL_ICP_LP_XHCI 0x34ed #define PCI_DEVICE_ID_INTEL_CMP_LP_XHCI 0x02ed +#define PCI_DEVICE_ID_INTEL_CMP_H_XHCI 0x06ed #define PCI_DEVICE_ID_INTEL_TGP_LP_XHCI 0xa0ed #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_XHCI 0x38ed
@@ -3409,6 +3450,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_P2SB 0xa320 #define PCI_DEVICE_ID_INTEL_ICL_P2SB 0x34a0 #define PCI_DEVICE_ID_INTEL_CMP_P2SB 0x02a0 +#define PCI_DEVICE_ID_INTEL_CMP_H_P2SB 0x06a0 #define PCI_DEVICE_ID_INTEL_TGL_P2SB 0xa0a0 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_P2SB 0x38a0
@@ -3419,6 +3461,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_SRAM 0xa36f #define PCI_DEVICE_ID_INTEL_ICL_SRAM 0x34ef #define PCI_DEVICE_ID_INTEL_CMP_SRAM 0x02ef +#define PCI_DEVICE_ID_INTEL_CMP_H_SRAM 0x06ef #define PCI_DEVICE_ID_INTEL_TGL_SRAM 0xa0ef #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SRAM 0x38ef
@@ -3434,6 +3477,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_AUDIO 0xa348 #define PCI_DEVICE_ID_INTEL_ICL_AUDIO 0x34c8 #define PCI_DEVICE_ID_INTEL_CMP_AUDIO 0x02c8 +#define PCI_DEVICE_ID_INTEL_CMP_H_AUDIO 0x06c8 #define PCI_DEVICE_ID_INTEL_BSW_AUDIO 0x2284 #define PCI_DEVICE_ID_INTEL_TGL_AUDIO 0xa0c8 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_AUDIO 0x38c8 @@ -3452,6 +3496,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_CSE0 0xa360 #define PCI_DEVICE_ID_INTEL_ICL_CSE0 0x34e0 #define PCI_DEVICE_ID_INTEL_CMP_CSE0 0x02e0 +#define PCI_DEVICE_ID_INTEL_CMP_H_CSE0 0x06e0 #define PCI_DEVICE_ID_INTEL_TGL_CSE0 0xa0e0 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_CSE0 0x38e0
@@ -3463,6 +3508,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_XDCI 0xa36e #define PCI_DEVICE_ID_INTEL_ICP_LP_XDCI 0x34ee #define PCI_DEVICE_ID_INTEL_CMP_LP_XDCI 0x02ee +#define PCI_DEVICE_ID_INTEL_CMP_H_XDCI 0x06ee #define PCI_DEVICE_ID_INTEL_TGP_LP_XDCI 0xa0ee
/* Intel SD device Ids */ @@ -3473,6 +3519,7 @@ #define PCI_DEVICE_ID_INTEL_CNP_H_SD 0xa375 #define PCI_DEVICE_ID_INTEL_ICL_SD 0x34f8 #define PCI_DEVICE_ID_INTEL_CMP_SD 0x02f5 +#define PCI_DEVICE_ID_INTEL_CMP_H_SD 0x06f5 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SD 0x38f8
/* Intel EMMC device Ids */ diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index 6aaba40..74a0020 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -754,6 +754,7 @@ PCI_DEVICE_ID_INTEL_CNP_H_CSE0, PCI_DEVICE_ID_INTEL_ICL_CSE0, PCI_DEVICE_ID_INTEL_CMP_CSE0, + PCI_DEVICE_ID_INTEL_CMP_H_CSE0, PCI_DEVICE_ID_INTEL_TGL_CSE0, PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_CSE0, 0, diff --git a/src/soc/intel/common/block/dsp/dsp.c b/src/soc/intel/common/block/dsp/dsp.c index 6c00ed1..306003b 100644 --- a/src/soc/intel/common/block/dsp/dsp.c +++ b/src/soc/intel/common/block/dsp/dsp.c @@ -33,6 +33,7 @@ PCI_DEVICE_ID_INTEL_SKL_AUDIO, PCI_DEVICE_ID_INTEL_CNP_H_AUDIO, PCI_DEVICE_ID_INTEL_CMP_AUDIO, + PCI_DEVICE_ID_INTEL_CMP_H_AUDIO, PCI_DEVICE_ID_INTEL_ICL_AUDIO, PCI_DEVICE_ID_INTEL_TGL_AUDIO, PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_AUDIO, diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index cbe189c..90931eb 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -209,6 +209,10 @@ PCI_DEVICE_ID_INTEL_CML_GT1_H_2, PCI_DEVICE_ID_INTEL_CML_GT2_H_1, PCI_DEVICE_ID_INTEL_CML_GT2_H_2, + PCI_DEVICE_ID_INTEL_CML_GT2_S_G0, + PCI_DEVICE_ID_INTEL_CML_GT2_S_P0, + PCI_DEVICE_ID_INTEL_CML_GT2_H_R0, + PCI_DEVICE_ID_INTEL_CML_GT2_H_R1, PCI_DEVICE_ID_INTEL_TGL_GT0, PCI_DEVICE_ID_INTEL_TGL_GT2_ULT, PCI_DEVICE_ID_INTEL_TGL_GT2_ULX, diff --git a/src/soc/intel/common/block/hda/hda.c b/src/soc/intel/common/block/hda/hda.c index 4a87e1a..12aa105 100644 --- a/src/soc/intel/common/block/hda/hda.c +++ b/src/soc/intel/common/block/hda/hda.c @@ -81,6 +81,7 @@ PCI_DEVICE_ID_INTEL_CNP_H_AUDIO, PCI_DEVICE_ID_INTEL_ICL_AUDIO, PCI_DEVICE_ID_INTEL_CMP_AUDIO, + PCI_DEVICE_ID_INTEL_CMP_H_AUDIO, PCI_DEVICE_ID_INTEL_BSW_AUDIO, PCI_DEVICE_ID_INTEL_TGL_AUDIO, 0 diff --git a/src/soc/intel/common/block/i2c/i2c.c b/src/soc/intel/common/block/i2c/i2c.c index bc692d3..70f2c21 100644 --- a/src/soc/intel/common/block/i2c/i2c.c +++ b/src/soc/intel/common/block/i2c/i2c.c @@ -235,6 +235,10 @@ PCI_DEVICE_ID_INTEL_CMP_I2C3, PCI_DEVICE_ID_INTEL_CMP_I2C4, PCI_DEVICE_ID_INTEL_CMP_I2C5, + PCI_DEVICE_ID_INTEL_CMP_H_I2C0, + PCI_DEVICE_ID_INTEL_CMP_H_I2C1, + PCI_DEVICE_ID_INTEL_CMP_H_I2C2, + PCI_DEVICE_ID_INTEL_CMP_H_I2C3, PCI_DEVICE_ID_INTEL_TGP_I2C0, PCI_DEVICE_ID_INTEL_TGP_I2C1, PCI_DEVICE_ID_INTEL_TGP_I2C2, diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c index 75c74f2..4bfb955 100644 --- a/src/soc/intel/common/block/p2sb/p2sb.c +++ b/src/soc/intel/common/block/p2sb/p2sb.c @@ -179,6 +179,7 @@ PCI_DEVICE_ID_INTEL_CNP_H_P2SB, PCI_DEVICE_ID_INTEL_ICL_P2SB, PCI_DEVICE_ID_INTEL_CMP_P2SB, + PCI_DEVICE_ID_INTEL_CMP_H_P2SB, PCI_DEVICE_ID_INTEL_TGL_P2SB, PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_P2SB, 0, diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c index ecc1fcb..ce43d34 100644 --- a/src/soc/intel/common/block/pcie/pcie.c +++ b/src/soc/intel/common/block/pcie/pcie.c @@ -250,6 +250,30 @@ PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP14, PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP15, PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP16, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP1, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP2, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP3, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP4, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP5, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP6, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP7, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP8, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP9, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP10, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP11, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP12, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP13, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP14, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP15, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP16, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP17, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP18, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP19, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP20, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP21, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP22, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP23, + PCI_DEVICE_ID_INTEL_CMP_H_PCIE_RP24, PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP1, PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP2, PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP3, diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c index 1645070..f3a755b 100644 --- a/src/soc/intel/common/block/pmc/pmc.c +++ b/src/soc/intel/common/block/pmc/pmc.c @@ -133,6 +133,7 @@ PCI_DEVICE_ID_INTEL_CNP_H_PMC, PCI_DEVICE_ID_INTEL_ICP_PMC, PCI_DEVICE_ID_INTEL_CMP_PMC, + PCI_DEVICE_ID_INTEL_CMP_H_PMC, PCI_DEVICE_ID_INTEL_TGP_PMC, PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PMC, 0 diff --git a/src/soc/intel/common/block/sata/sata.c b/src/soc/intel/common/block/sata/sata.c index 0f26262..40ffb21 100644 --- a/src/soc/intel/common/block/sata/sata.c +++ b/src/soc/intel/common/block/sata/sata.c @@ -96,6 +96,9 @@ PCI_DEVICE_ID_INTEL_CMP_SATA, PCI_DEVICE_ID_INTEL_CMP_PREMIUM_SATA, PCI_DEVICE_ID_INTEL_CMP_LP_SATA, + PCI_DEVICE_ID_INTEL_CMP_H_SATA, + PCI_DEVICE_ID_INTEL_CMP_H_HALO_SATA, + PCI_DEVICE_ID_INTEL_CMP_H_PREMIUM_SATA, PCI_DEVICE_ID_INTEL_TGP_LP_SATA, PCI_DEVICE_ID_INTEL_TGP_SATA, PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA, diff --git a/src/soc/intel/common/block/scs/sd.c b/src/soc/intel/common/block/scs/sd.c index e94e4e9..e815287 100644 --- a/src/soc/intel/common/block/scs/sd.c +++ b/src/soc/intel/common/block/scs/sd.c @@ -73,6 +73,7 @@ PCI_DEVICE_ID_INTEL_CNP_H_SD, PCI_DEVICE_ID_INTEL_ICL_SD, PCI_DEVICE_ID_INTEL_CMP_SD, + PCI_DEVICE_ID_INTEL_CMP_H_SD, PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SD, 0 }; diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c index c9a6b17..6be2a5e 100644 --- a/src/soc/intel/common/block/smbus/smbus.c +++ b/src/soc/intel/common/block/smbus/smbus.c @@ -95,6 +95,7 @@ PCI_DEVICE_ID_INTEL_LWB_SMBUS, PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS, PCI_DEVICE_ID_INTEL_CMP_SMBUS, + PCI_DEVICE_ID_INTEL_CMP_H_SMBUS, PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS, PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SMBUS, 0 diff --git a/src/soc/intel/common/block/spi/spi.c b/src/soc/intel/common/block/spi/spi.c index eedde75..5ce4008 100644 --- a/src/soc/intel/common/block/spi/spi.c +++ b/src/soc/intel/common/block/spi/spi.c @@ -81,6 +81,10 @@ PCI_DEVICE_ID_INTEL_CMP_SPI1, PCI_DEVICE_ID_INTEL_CMP_SPI2, PCI_DEVICE_ID_INTEL_CMP_HWSEQ_SPI, + PCI_DEVICE_ID_INTEL_CMP_H_SPI0, + PCI_DEVICE_ID_INTEL_CMP_H_SPI1, + PCI_DEVICE_ID_INTEL_CMP_H_SPI2, + PCI_DEVICE_ID_INTEL_CMP_H_HWSEQ_SPI, PCI_DEVICE_ID_INTEL_TGP_SPI0, PCI_DEVICE_ID_INTEL_TGP_GSPI0, PCI_DEVICE_ID_INTEL_TGP_GSPI1, diff --git a/src/soc/intel/common/block/sram/sram.c b/src/soc/intel/common/block/sram/sram.c index 9e44fa3..a994235 100644 --- a/src/soc/intel/common/block/sram/sram.c +++ b/src/soc/intel/common/block/sram/sram.c @@ -51,6 +51,7 @@ PCI_DEVICE_ID_INTEL_GLK_SRAM, PCI_DEVICE_ID_INTEL_ICL_SRAM, PCI_DEVICE_ID_INTEL_CMP_SRAM, + PCI_DEVICE_ID_INTEL_CMP_H_SRAM, PCI_DEVICE_ID_INTEL_TGL_SRAM, PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SRAM, 0, diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index 4053516..bcb04ac 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -275,6 +275,9 @@ PCI_DEVICE_ID_INTEL_CMP_UART0, PCI_DEVICE_ID_INTEL_CMP_UART1, PCI_DEVICE_ID_INTEL_CMP_UART2, + PCI_DEVICE_ID_INTEL_CMP_H_UART0, + PCI_DEVICE_ID_INTEL_CMP_H_UART1, + PCI_DEVICE_ID_INTEL_CMP_H_UART2, PCI_DEVICE_ID_INTEL_TGP_UART0, PCI_DEVICE_ID_INTEL_TGP_UART1, PCI_DEVICE_ID_INTEL_TGP_UART2, diff --git a/src/soc/intel/common/block/xdci/xdci.c b/src/soc/intel/common/block/xdci/xdci.c index 92f3b15..2296f9f 100644 --- a/src/soc/intel/common/block/xdci/xdci.c +++ b/src/soc/intel/common/block/xdci/xdci.c @@ -43,6 +43,7 @@ PCI_DEVICE_ID_INTEL_CNP_H_XDCI, PCI_DEVICE_ID_INTEL_ICP_LP_XDCI, PCI_DEVICE_ID_INTEL_CMP_LP_XDCI, + PCI_DEVICE_ID_INTEL_CMP_H_XDCI, PCI_DEVICE_ID_INTEL_TGP_LP_XDCI, 0 }; diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c index af4d132..e6a7e0d 100644 --- a/src/soc/intel/common/block/xhci/xhci.c +++ b/src/soc/intel/common/block/xhci/xhci.c @@ -131,6 +131,7 @@ PCI_DEVICE_ID_INTEL_CNP_H_XHCI, PCI_DEVICE_ID_INTEL_ICP_LP_XHCI, PCI_DEVICE_ID_INTEL_CMP_LP_XHCI, + PCI_DEVICE_ID_INTEL_CMP_H_XHCI, PCI_DEVICE_ID_INTEL_TGP_LP_XHCI, PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_XHCI, 0
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Angel Pons (Code Review) -
Duncan Laurie (Code Review)
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Gaggery Tsai (Code Review)
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Patrick Georgi (Code Review)