Change in coreboot[master]: soc/amd/{cezanne,common}/acpi: Add _OSC method

[Raul Rangel (Code Review)]

Raul Rangel has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52528 )

Change subject: soc/amd/{cezanne,common}/acpi: Add _OSC method
......................................................................

soc/amd/{cezanne,common}/acpi: Add _OSC method

The linux kernel requires a valid _OSC method. Otherwise the _LPI table
is ignored.
See https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/thir...

Before this patch:
acpi_processor_get_lpi_info: LPI is not supported

After this patch:
acpi_processor_evaluate_lpi: ACPI: _SB_.CP00: ACPI: Found 4 power states

BUG=b:178728116
TEST=Boot OS and verify _LPI table is parsed

Signed-off-by: Raul E Rangel 
Change-Id: I44e554b9db6f70fdd1559105cdaee53aeb2bfbf5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52528
Tested-by: build bot (Jenkins) 
Reviewed-by: Marshall Dawson 
---
M src/soc/amd/cezanne/acpi/soc.asl
A src/soc/amd/common/acpi/osc.asl
2 files changed, 24 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Marshall Dawson: Looks good to me, approved

diff --git a/src/soc/amd/cezanne/acpi/soc.asl b/src/soc/amd/cezanne/acpi/soc.asl
index be51104..f7781da 100644
--- a/src/soc/amd/cezanne/acpi/soc.asl
+++ b/src/soc/amd/cezanne/acpi/soc.asl
@@ -8,6 +8,8 @@

#include <soc/amd/common/acpi/gpio_bank_lib.asl>

+	#include <soc/amd/common/acpi/osc.asl>
+
    #include "pci_int_defs.asl"

#include "mmio.asl"
diff --git a/src/soc/amd/common/acpi/osc.asl b/src/soc/amd/common/acpi/osc.asl
new file mode 100644
index 0000000..22175ca
--- /dev/null
+++ b/src/soc/amd/common/acpi/osc.asl
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi_osc.h>
+
+/*
+ * Platform-Wide _OSC Operating System Capabilities
+ *
+ * Arg0: A Buffer containing a UUID
+ * Arg1: An Integer containing a Revision ID of the buffer format
+ * Arg2: An Integer containing a count of entries in Arg3
+ * Arg3: A Buffer containing a list of DWORD capabilities
+ */
+Method (_OSC, 4, NotSerialized) {
+	CreateDWordField (Arg3, 0, CDW1)
+	If (Arg0 == ToUUID (OSC_SB_UUID)) {
+		/* Don't mask any capability bits off. */
+		Return (Arg3)
+	} Else {
+		CDW1 |= OSC_CDW1_UNRECOGNIZED_UUID
+		Return (Arg3)
+	}
+}