Change in coreboot[master]: mb/kontron/ktqm77: Do not overwrite pei_data

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43025 )

Change subject: mb/kontron/ktqm77: Do not overwrite pei_data
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mb/kontron/ktqm77: Do not overwrite pei_data

Most of the values are already set in northbridge code.

Change-Id: I171816ce847bea139afeb0ab56e74144cd006c6b
Signed-off-by: Angel Pons 
---
M src/mainboard/kontron/ktqm77/early_init.c
1 file changed, 29 insertions(+), 55 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/43025/1

diff --git a/src/mainboard/kontron/ktqm77/early_init.c b/src/mainboard/kontron/ktqm77/early_init.c
index b8f44b5..92f169c 100644
--- a/src/mainboard/kontron/ktqm77/early_init.c
+++ b/src/mainboard/kontron/ktqm77/early_init.c
@@ -53,62 +53,36 @@

void mainboard_fill_pei_data(struct pei_data *pei_data)
 {
-	struct pei_data pei_data_template = {
-		.pei_version = PEI_VERSION,
-		.mchbar = (uintptr_t)DEFAULT_MCHBAR,
-		.dmibar = (uintptr_t)DEFAULT_DMIBAR,
-		.epbar = DEFAULT_EPBAR,
-		.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
-		.smbusbar = SMBUS_IO_BASE,
-		.wdbbar = 0x4000000,
-		.wdbsize = 0x1000,
-		.hpet_address = CONFIG_HPET_ADDRESS,
-		.rcba = (uintptr_t)DEFAULT_RCBABASE,
-		.pmbase = DEFAULT_PMBASE,
-		.gpiobase = DEFAULT_GPIOBASE,
-		.thermalbase = 0xfed08000,
-		.system_type = 0, /* 0 Mobile, 1 Desktop/Server */
-		.tseg_size = CONFIG_SMM_TSEG_SIZE,
-		.spd_addresses = { 0xA0, 0x00,0xA4,0x00 },
-		.ts_addresses = { 0x00, 0x00, 0x00, 0x00 },
-		.ec_present = 1,
-		.gbe_enable = 1,
-		.ddr3lv_support = 0,
-		/*
-		 * 0 = leave channel enabled
-		 * 1 = disable dimm 0 on channel
-		 * 2 = disable dimm 1 on channel
-		 * 3 = disable dimm 0+1 on channel
-		 */
-		.dimm_channel0_disabled = 2,
-		.dimm_channel1_disabled = 2,
-		.max_ddr3_freq = 1600,
-		.usb_port_config = {
-			 /* enabled   USB oc pin    length */
-			{ 1, 0, 0x0040 }, /* P0: lower left USB 3.0 (OC0) */
-			{ 1, 0, 0x0040 }, /* P1: upper left USB 3.0 (OC0) */
-			{ 1, 0, 0x0040 }, /* P2: lower right USB 3.0 (OC0) */
-			{ 1, 0, 0x0040 }, /* P3: upper right USB 3.0 (OC0) */
-			{ 1, 0, 0x0040 }, /* P4: lower USB 2.0 (OC0) */
-			{ 1, 0, 0x0040 }, /* P5: upper USB 2.0 (OC0) */
-			{ 1, 0, 0x0040 }, /* P6: front panel USB 2.0 (OC0) */
-			{ 1, 0, 0x0040 }, /* P7: front panel USB 2.0 (OC0) */
-			{ 1, 4, 0x0040 }, /* P8: internal USB 2.0 (OC4) */
-			{ 1, 4, 0x0040 }, /* P9: internal USB 2.0 (OC4) */
-			{ 1, 4, 0x0040 }, /* P10: internal USB 2.0 (OC4) */
-			{ 1, 4, 0x0040 }, /* P11: internal USB 2.0 (OC4) */
-			{ 1, 4, 0x0040 }, /* P12: internal USB 2.0 (OC4) */
-			{ 1, 4, 0x0040 }, /* P13: internal USB 2.0 (OC4) */
-		},
-		.usb3 = {
-			.mode =			3,	/* Smart Auto? */
-			.hs_port_switch_mask =	0xf,	/* All four ports. */
-			.preboot_support =	1,	/* preOS driver? */
-			.xhci_streams =		1,	/* Enable. */
-		},
-		.pcie_init = 1,
+	pei_data->system_type   = 0; /* 0 Mobile, 1 Desktop/Server */
+	pei_data->ec_present    = 1;
+	pei_data->spd_addresses = { 0xA0, 0x00, 0xA4, 0x00 };
+	pei_data->max_ddr3_freq = 1600;
+	pei_data->pcie_init     = 1;
+
+	pei_data->usb_port_config = {
+		 /* enabled   USB oc pin    length */
+		{ 1, 0, 0x0040 }, /* P0: lower left USB 3.0 (OC0) */
+		{ 1, 0, 0x0040 }, /* P1: upper left USB 3.0 (OC0) */
+		{ 1, 0, 0x0040 }, /* P2: lower right USB 3.0 (OC0) */
+		{ 1, 0, 0x0040 }, /* P3: upper right USB 3.0 (OC0) */
+		{ 1, 0, 0x0040 }, /* P4: lower USB 2.0 (OC0) */
+		{ 1, 0, 0x0040 }, /* P5: upper USB 2.0 (OC0) */
+		{ 1, 0, 0x0040 }, /* P6: front panel USB 2.0 (OC0) */
+		{ 1, 0, 0x0040 }, /* P7: front panel USB 2.0 (OC0) */
+		{ 1, 4, 0x0040 }, /* P8: internal USB 2.0 (OC4) */
+		{ 1, 4, 0x0040 }, /* P9: internal USB 2.0 (OC4) */
+		{ 1, 4, 0x0040 }, /* P10: internal USB 2.0 (OC4) */
+		{ 1, 4, 0x0040 }, /* P11: internal USB 2.0 (OC4) */
+		{ 1, 4, 0x0040 }, /* P12: internal USB 2.0 (OC4) */
+		{ 1, 4, 0x0040 }, /* P13: internal USB 2.0 (OC4) */
    };
-	*pei_data = pei_data_template;
+
+	pei_data->usb3 = {
+		.mode =			3,	/* Smart Auto? */
+		.hs_port_switch_mask =	0xf,	/* All four ports. */
+		.preboot_support =	1,	/* preOS driver? */
+		.xhci_streams =		1,	/* Enable. */
+	};
 }

const struct southbridge_usb_port mainboard_usb_ports[] = {

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43025 )

Change subject: mb/kontron/ktqm77: Do not overwrite pei_data
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Patch Set 1: Code-Review+1

(1 comment)

https://review.coreboot.org/c/coreboot/+/43025/1/src/mainboard/kontron/ktqm7... 
File src/mainboard/kontron/ktqm77/early_init.c:

https://review.coreboot.org/c/coreboot/+/43025/1/src/mainboard/kontron/ktqm7... 
PS1, Line 56: pei_data->system_type
already done at northbridge/intel/sandybridge/raminit_mrc.c line #238 ?

[Angel Pons (Code Review)]

Angel Pons has removed HAOUAS Elyes from this change.  ( https://review.coreboot.org/c/coreboot/+/43025 )

Change subject: mb/kontron/ktqm77: Do not overwrite pei_data
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Removed reviewer HAOUAS Elyes with the following votes:

* Code-Review+1 by HAOUAS Elyes

[Angel Pons (Code Review)]

Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/43025 )

Change subject: mb/kontron/ktqm77: Do not overwrite pei_data
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Abandoned