Change in coreboot[master]: mainboard/google/poppy: Power down camera rails when suspending

[Furquan Shaikh (Code Review)]

Furquan Shaikh has uploaded a new change for review. ( https://review.coreboot.org/19953 )

Change subject: mainboard/google/poppy: Power down camera rails when suspending
......................................................................

mainboard/google/poppy: Power down camera rails when suspending

BUG=b:62147763

Change-Id: Iba88fed972b847448e01fcfca8c7129d950244c2
Signed-off-by: Furquan Shaikh 
---
M src/mainboard/google/poppy/smihandler.c
M src/mainboard/google/poppy/variants/baseboard/include/baseboard/gpio.h
2 files changed, 14 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/19953/1

diff --git a/src/mainboard/google/poppy/smihandler.c b/src/mainboard/google/poppy/smihandler.c
index 88aa905..0289742 100644
--- a/src/mainboard/google/poppy/smihandler.c
+++ b/src/mainboard/google/poppy/smihandler.c
@@ -15,8 +15,11 @@

#include <cpu/x86/smm.h>
 #include <ec/google/chromeec/smm.h>
+#include <gpio.h>
+#include <soc/gpio.h>
 #include <soc/smm.h>

+#include <variant/gpio.h>
 #include <variant/ec.h>

void mainboard_smi_espi_handler(void)
@@ -24,10 +27,17 @@
    chromeec_smi_process_events();
 }

+static void mainboard_gpio_smi_sleep(void)
+{
+	gpio_set(EN_PP3300_DX_CAM, 0);
+	gpio_set(EN_CAM_PMIC_RST_L, 0);
+}
+
 void mainboard_smi_sleep(u8 slp_typ)
 {
    chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
    		MAINBOARD_EC_S5_WAKE_EVENTS);
+	mainboard_gpio_smi_sleep();
 }

int mainboard_smi_apmc(u8 apmc)
diff --git a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/gpio.h
index 628483b..4c9ade3 100644
--- a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/gpio.h
+++ b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/gpio.h
@@ -37,4 +37,8 @@
 /* eSPI virtual wire reporting */
 #define EC_SCI_GPI		GPE0_ESPI

+/* Power rail control signals */
+#define EN_PP3300_DX_CAM	GPP_C11
+#define EN_CAM_PMIC_RST_L	GPP_C10
+
 #endif /* BASEBOARD_GPIO_H */