Patch set updated for coreboot: c34ed81 storm: modify memory layout

[Marc Jones]

Marc Jones ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8012

-gerrit

commit c34ed81da4889caa1a6b5cad7a7cd73a2cc236a3
Author: Vadim Bendebury 
Date:   Wed May 28 10:49:51 2014 -0700

storm: modify memory layout

This is an interim change (before EFS is enabled), align ROM and RAM
    stages so that they have enough room and do not step over each other.

BUG=chrome-os-partner:27784
    TEST=manual
       . booted coreboot successfully on ap148

Original-Change-Id: I6e1710ac7ca494a69aea5ba3b117bfd882aded26
    Original-Signed-off-by: Vadim Bendebury 
    Original-Reviewed-on: https://chromium-review.googlesource.com/202046
    Original-Reviewed-by: David Hendricks 
    Original-Reviewed-by: Trevor Bourget 
    (cherry picked from commit f1fd4e3f9d699cc694cf7840c169db9bbe9193b6)
    Signed-off-by: Marc Jones

Change-Id: I9861d34a8bdd6963afbeed7fca7fda8a891ec481
---
 src/soc/qualcomm/ipq806x/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index 5769a77..8ab5e67 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -45,11 +45,11 @@ config BOOTBLOCK_BASE

config ROMSTAGE_BASE
    hex
-	default 0x40608000
+	default 0x40620000

config RAMSTAGE_BASE
    hex
-	default 0x4060c000
+	default 0x40640000

config SYS_SDRAM_BASE
    hex