[S] Change in coreboot[main]: soc/amd/phoenix/chipset_*: Enable gpp_bridge_[a/b/c] by default - coreboot-gerrit

14 Feb 2025


      Attention is currently required from: Fred Reitberger, Jason Glenesk, Matt DeVillier, Maximilian Brune.
Felix Held has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/86271?usp=email )
Change subject: soc/amd/phoenix/chipset_*: Enable gpp_bridge_[a/b/c] by default
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Patch Set 3: Code-Review+2
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Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ic226fd93b431467c7fa3a53140102ff4fd327f40
Gerrit-Change-Number: 86271
Gerrit-PatchSet: 3
Gerrit-Owner: Maximilian Brune maximilian.brune@9elements.com
Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de
Gerrit-Reviewer: Fred Reitberger reitbergerfred@gmail.com
Gerrit-Reviewer: Jason Glenesk jason.glenesk@gmail.com
Gerrit-Reviewer: Matt DeVillier matt.devillier@amd.corp-partner.google.com
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Gerrit-Comment-Date: Fri, 14 Feb 2025 16:56:04 +0000
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