Patch merged into coreboot/master: 9f83e87 baytrail: add GPIO SMI support

the following patch was just integrated into master:
commit 9f83e873f4f0a06a68f68414720e837a69f54184
Author: Aaron Durbin 
Date:   Mon Nov 11 14:45:27 2013 -0600

baytrail: add GPIO SMI support

GPIOs which trigger SMIs only set the status bits in the ALT_GPIO_SMI
    regier. No bits in the SMI_STS register are set. Therefore, the
    ALT_GPIO_SMI register needs to be read and cleared on every SMI.
    Additionally, the mainboard_gpi_smi() handler needs to be called as
    well on every SMI because of this property.

BUG=chrome-os-partner:23505
    BRANCH=None
    TEST=Built and booted to recovery screen. Typed 'lidclose' on EC
         console. SMI occurred which caused the board to be shutdown.

Change-Id: Ic204d8b928a0cb4f51f108a649f374d9f94e4f47
    Signed-off-by: Aaron Durbin 
    Reviewed-on: https://chromium-review.googlesource.com/176391
    Reviewed-by: Duncan Laurie 
    Reviewed-on: http://review.coreboot.org/4958
    Tested-by: build bot (Jenkins)
    Reviewed-by: Kyösti Mälkki

See http://review.coreboot.org/4958 for details.

-gerrit