Change in coreboot[master]: Experimental T61 support. Board boots to console over dock. No RAM yet.

[Damien Zammit (Code Review)]

Damien Zammit has uploaded this change for review. ( https://review.coreboot.org/8482

Change subject: Experimental T61 support. Board boots to console over dock. No RAM yet.
......................................................................

Experimental T61 support.
Board boots to console over dock.
No RAM yet.

Change-Id: Idbc058207a6a2efc9e1baaef8564664e6c8063e2
Signed-off-by: Damien Zammit 
---
M src/cpu/intel/speedstep/Makefile.inc
M src/cpu/x86/smm/smmrelocate.S
M src/mainboard/lenovo/Kconfig
A src/mainboard/lenovo/t61/Kconfig
A src/mainboard/lenovo/t61/Makefile.inc
A src/mainboard/lenovo/t61/acpi_tables.c
A src/mainboard/lenovo/t61/devicetree.cb
A src/mainboard/lenovo/t61/dock.c
A src/mainboard/lenovo/t61/dock.h
A src/mainboard/lenovo/t61/romstage.c
M src/northbridge/intel/Kconfig
M src/northbridge/intel/Makefile.inc
A src/northbridge/intel/i965/Kconfig
A src/northbridge/intel/i965/Makefile.inc
A src/northbridge/intel/i965/acpi.c
A src/northbridge/intel/i965/acpi/hostbridge.asl
A src/northbridge/intel/i965/acpi/i965.asl
A src/northbridge/intel/i965/acpi/igd.asl
A src/northbridge/intel/i965/acpi/peg.asl
A src/northbridge/intel/i965/bootblock.c
A src/northbridge/intel/i965/debug.c
A src/northbridge/intel/i965/early_init.c
A src/northbridge/intel/i965/errata.c
A src/northbridge/intel/i965/i965.h
A src/northbridge/intel/i965/ram_calc.c
A src/northbridge/intel/i965/raminit.c
A src/northbridge/intel/i965/raminit.h
A src/northbridge/intel/i965/rcven.c
A src/northbridge/intel/i965/udelay.c
M src/southbridge/intel/Kconfig
M src/southbridge/intel/Makefile.inc
A src/southbridge/intel/i82801hx/Kconfig
A src/southbridge/intel/i82801hx/Makefile.inc
A src/southbridge/intel/i82801hx/acpi/audio.asl
A src/southbridge/intel/i82801hx/acpi/globalnvs.asl
A src/southbridge/intel/i82801hx/acpi/irqlinks.asl
A src/southbridge/intel/i82801hx/acpi/lpc.asl
A src/southbridge/intel/i82801hx/acpi/pata.asl
A src/southbridge/intel/i82801hx/acpi/pci.asl
A src/southbridge/intel/i82801hx/acpi/pcie.asl
A src/southbridge/intel/i82801hx/acpi/sata.asl
A src/southbridge/intel/i82801hx/acpi/sleepstates.asl
A src/southbridge/intel/i82801hx/acpi/smbus.asl
A src/southbridge/intel/i82801hx/acpi/usb.asl
A src/southbridge/intel/i82801hx/azalia.c
A src/southbridge/intel/i82801hx/bootblock.c
A src/southbridge/intel/i82801hx/chip.h
A src/southbridge/intel/i82801hx/early_lpc.c
A src/southbridge/intel/i82801hx/early_smbus.c
A src/southbridge/intel/i82801hx/i82801hx.c
A src/southbridge/intel/i82801hx/i82801hx.h
A src/southbridge/intel/i82801hx/ide.c
A src/southbridge/intel/i82801hx/lpc.c
A src/southbridge/intel/i82801hx/nic.c
A src/southbridge/intel/i82801hx/nvs.h
A src/southbridge/intel/i82801hx/pci.c
A src/southbridge/intel/i82801hx/pcie.c
A src/southbridge/intel/i82801hx/reset.c
A src/southbridge/intel/i82801hx/sata.c
A src/southbridge/intel/i82801hx/smbus.c
A src/southbridge/intel/i82801hx/smbus.h
A src/southbridge/intel/i82801hx/smi.c
A src/southbridge/intel/i82801hx/smihandler.c
A src/southbridge/intel/i82801hx/usb.c
A src/southbridge/intel/i82801hx/usb_ehci.c
A src/southbridge/intel/i82801hx/watchdog.c
66 files changed, 13,212 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/8482/1