[S] Change in coreboot[main]: soc/amd/mendocino: Add DBG2 ACPI table

[Matt DeVillier (Code Review)]

Attention is currently required from: Bao Zheng, Cliff Huang, Fred Reitberger, Jason Glenesk, Lance Zhao, Raul Rangel, Simon Glass, Tim Wawrzynczak, Zheng Bao.

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79174?usp=email )

Change subject: soc/amd/mendocino: Add DBG2 ACPI table
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Patch Set 7:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/79174/comment/59ef32e7_58f01b18 :
PS7, Line 7: mendocino
needs updating

File src/soc/amd/common/block/uart/uart.c:

https://review.coreboot.org/c/coreboot/+/79174/comment/bac92231_80aa93f4 :
PS7, Line 111: get_uart_for_console
> Don't you want to check that the current device is equal to the selected console? The way this is wr […]

it might make more sense to put this in `southbridge_write_acpi_tables()` in `src/soc/amd/common/block/acpi/tables.c` so it's only called once without having to check the index of each UART