Change in coreboot[master]: soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID...
Wim Vervoorn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36856 )
Change subject: soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is defined ......................................................................
soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is defined
On mainboards without DPTF_TSRX_SENSOR_ID method DTRP is never called Only the DTRP method when at least one sensor is enabled.
BUG=N/A TEST=build
Change-Id: I4fb26d5bbb7b334e759e7073b680f830f412467e Signed-off-by: Wim Vervoorn wvervoorn@eltan.com --- M src/soc/intel/skylake/acpi/dptf/thermal.asl 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/36856/1
diff --git a/src/soc/intel/skylake/acpi/dptf/thermal.asl b/src/soc/intel/skylake/acpi/dptf/thermal.asl index 71f7b83..88f39b7 100644 --- a/src/soc/intel/skylake/acpi/dptf/thermal.asl +++ b/src/soc/intel/skylake/acpi/dptf/thermal.asl @@ -75,6 +75,7 @@ #endif }
+#ifdef DPTF_TSR0_SENSOR_ID | DPTF_TSR1_SENSOR_ID | DPTF_TSR2_SENSOR_ID /* * Method to return trip temperature value depending upon the device mode. * Arg0 --> Value to return when device is in tablet mode @@ -92,6 +93,7 @@ } #endif } +#endif
#ifdef DPTF_TSR0_SENSOR_ID
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36856 )
Change subject: soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is defined ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36856/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36856/2//COMMIT_MSG@10 PS2, Line 10: Only the DTRP method when at least one sensor is enabled. "Only add"?
https://review.coreboot.org/c/coreboot/+/36856/2/src/soc/intel/skylake/acpi/... File src/soc/intel/skylake/acpi/dptf/thermal.asl:
https://review.coreboot.org/c/coreboot/+/36856/2/src/soc/intel/skylake/acpi/... PS2, Line 78: #ifdef DPTF_TSR0_SENSOR_ID | DPTF_TSR1_SENSOR_ID | DPTF_TSR2_SENSOR_ID first time I see this syntax. For more complex preprocessor statements we usually use #if defined(FOO) || defined(BAR)
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36856
to look at the new patch set (#3).
Change subject: soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is defined ......................................................................
soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is defined
On mainboards without DPTF_TSRX_SENSOR_ID method DTRP is never called Only the DTRP method when at least one sensor is enabled.
BUG=N/A TEST=build
Change-Id: I4fb26d5bbb7b334e759e7073b680f830f412467e Signed-off-by: Wim Vervoorn wvervoorn@eltan.com --- M src/soc/intel/skylake/acpi/dptf/thermal.asl 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/36856/3
Wim Vervoorn has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36856 )
Change subject: soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is defined ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36856/2/src/soc/intel/skylake/acpi/... File src/soc/intel/skylake/acpi/dptf/thermal.asl:
https://review.coreboot.org/c/coreboot/+/36856/2/src/soc/intel/skylake/acpi/... PS2, Line 78: #ifdef DPTF_TSR0_SENSOR_ID | DPTF_TSR1_SENSOR_ID | DPTF_TSR2_SENSOR_ID
first time I see this syntax. […]
Thanks for noticing. This was overlooked. Multiple items aren't supported by #ifdef. This is changed and now works as expected.
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36856
to look at the new patch set (#4).
Change subject: soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is defined ......................................................................
soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is defined
On mainboards without DPTF_TSRX_SENSOR_ID method DTRP is never called Only add the DTRP method when at least one sensor is enabled.
BUG=N/A TEST=build
Change-Id: I4fb26d5bbb7b334e759e7073b680f830f412467e Signed-off-by: Wim Vervoorn wvervoorn@eltan.com --- M src/soc/intel/skylake/acpi/dptf/thermal.asl 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/36856/4
Wim Vervoorn has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36856 )
Change subject: soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is defined ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36856/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36856/2//COMMIT_MSG@10 PS2, Line 10: Only the DTRP method when at least one sensor is enabled.
"Only add"?
Done
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36856 )
Change subject: soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is defined ......................................................................
Patch Set 4: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36856 )
Change subject: soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is defined ......................................................................
soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is defined
On mainboards without DPTF_TSRX_SENSOR_ID method DTRP is never called Only add the DTRP method when at least one sensor is enabled.
BUG=N/A TEST=build
Change-Id: I4fb26d5bbb7b334e759e7073b680f830f412467e Signed-off-by: Wim Vervoorn wvervoorn@eltan.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/36856 Reviewed-by: Patrick Georgi pgeorgi@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/skylake/acpi/dptf/thermal.asl 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/soc/intel/skylake/acpi/dptf/thermal.asl b/src/soc/intel/skylake/acpi/dptf/thermal.asl index 71f7b83..5f3548e 100644 --- a/src/soc/intel/skylake/acpi/dptf/thermal.asl +++ b/src/soc/intel/skylake/acpi/dptf/thermal.asl @@ -75,6 +75,7 @@ #endif }
+#if defined(DPTF_TSR0_SENSOR_ID) || defined(DPTF_TSR1_SENSOR_ID) || defined(DPTF_TSR2_SENSOR_ID) /* * Method to return trip temperature value depending upon the device mode. * Arg0 --> Value to return when device is in tablet mode @@ -92,6 +93,7 @@ } #endif } +#endif
#ifdef DPTF_TSR0_SENSOR_ID
-
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Wim Vervoorn (Code Review)