Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75377 )
Change subject: nb/intel/gm45/gma: Use res2mmio() directly for GTT access ......................................................................
nb/intel/gm45/gma: Use res2mmio() directly for GTT access
This is how res2mmio() is supposed to be used and there was no other use of the `mmio` variable left anyway.
Change-Id: Ifa4645bcc9ae971966587d9b67662b9dc8bae3d0 Signed-off-by: Nico Huber nico.h@gmx.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/75377 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Arthur Heymans arthur@aheymans.xyz Reviewed-by: Felix Singer service+coreboot-gerrit@felixsinger.de --- M src/northbridge/intel/gm45/gma.c 1 file changed, 18 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Felix Singer: Looks good to me, approved
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index ef7b872..6034ae3 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -172,7 +172,6 @@
static void gma_func0_init(struct device *dev) { - u8 *mmio; const struct northbridge_intel_gm45_config *const conf = dev->chip_info; const char *edid_str;
@@ -188,14 +187,12 @@ if (!edid_str) printk(BIOS_ERR, "Failed to obtain LVDS EDID string!\n");
- mmio = res2mmio(gtt_res, 0, 0); - /* * GTT base is at a 2M offset and is 2M big. If GTT is smaller than 2M * cycles are simply not decoded which is fine. */ pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); - memset(mmio + 2 * MiB, 0, 2 * MiB); + memset(res2mmio(gtt_res, 2*MiB, 0), 0, 2*MiB);
if (CONFIG(NO_GFX_INIT)) pci_and_config16(dev, PCI_COMMAND, ~PCI_COMMAND_MASTER);