Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86186?usp=email )
Change subject: mb/starlabs/*: Correct config for SATA DEVSLP GPIO ......................................................................
mb/starlabs/*: Correct config for SATA DEVSLP GPIO
On boards that do not use SATA, this should be connected.
For boards that do use it, it should be NF5.
Change-Id: I3115627431e80bd5e0f91b53b80fac7c0c95e6f8 Signed-off-by: Sean Rhodes sean@starlabs.systems Reviewed-on: https://review.coreboot.org/c/coreboot/+/86186 Reviewed-by: Matt DeVillier matt.devillier@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c M src/mainboard/starlabs/starbook/variants/adl/gpio.c M src/mainboard/starlabs/starbook/variants/mtl/gpio.c M src/mainboard/starlabs/starfighter/variants/rpl/gpio.c 4 files changed, 4 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved
diff --git a/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c b/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c index f4d7ab0..35d9489 100644 --- a/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c +++ b/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c @@ -362,7 +362,7 @@ /* H12: Not Connected */ PAD_NC(GPP_H12, NONE), /* H13: PCH M.2 SSD Device Sleep */ - PAD_CFG_GPO(GPP_H13, 0, PLTRST), + PAD_CFG_NF(GPP_H13, NONE, DEEP, NF5), /* H14: Not Connected */ PAD_NC(GPP_H14, NONE), /* H15: DDPB Control Clock */ diff --git a/src/mainboard/starlabs/starbook/variants/adl/gpio.c b/src/mainboard/starlabs/starbook/variants/adl/gpio.c index 21821be..77be325 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl/gpio.c @@ -361,7 +361,7 @@ /* H12: Not Connected */ PAD_NC(GPP_H12, NONE), /* H13: PCH M.2 SSD Device Sleep */ - PAD_CFG_GPO(GPP_H13, 0, PLTRST), + PAD_CFG_NF(GPP_H13, NONE, DEEP, NF5), /* H14: Not Connected */ PAD_NC(GPP_H14, NONE), /* H15: DDPB Control Clock */ diff --git a/src/mainboard/starlabs/starbook/variants/mtl/gpio.c b/src/mainboard/starlabs/starbook/variants/mtl/gpio.c index b3ed9e2..fd4a090 100644 --- a/src/mainboard/starlabs/starbook/variants/mtl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/mtl/gpio.c @@ -202,6 +202,7 @@ /* E03: */ PAD_NC(GPP_E03, NONE), /* E04: M.2_SSD_DEVSLP0 */ + PAD_NC(GPP_E04, NONE), /* E05: */ PAD_NC(GPP_E05, NONE), /* E06: JTAG ODT diff --git a/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c b/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c index e0e6164..18c5651 100644 --- a/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c +++ b/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c @@ -358,7 +358,7 @@ /* H12: Not Connected */ PAD_NC(GPP_H12, NONE), /* H13: PCH M.2 SSD Device Sleep */ - PAD_CFG_GPO(GPP_H13, 0, PLTRST), + PAD_NC(GPP_H13, NONE), /* H14: Not Connected */ PAD_NC(GPP_H14, NONE), /* H15: DDPB Control Clock */