[XS] Change in coreboot[main]: soc/mediatek/mt8196: Add GCE ddren sel control to mminfra - coreboot-gerrit

17 Jan 2025


      Attention is currently required from: Hung-Te Lin, Jarried Lin, Jason-jh Lin.
Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86027?usp=email )
Change subject: soc/mediatek/mt8196: Add GCE ddren sel control to mminfra
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Patch Set 4: Code-Review+2
(1 comment)
File src/soc/mediatek/mt8196/mminfra.c:
https://review.coreboot.org/c/coreboot/+/86027/comment/f36b5e71_05bb1a34?usp... :
PS3, Line 35: 0x1
...
But other places in this file also use Hex for the non-zreo settings. […]
Acknowledged
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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I30309b0426f803e28858eb15652a649927f94c7e
Gerrit-Change-Number: 86027
Gerrit-PatchSet: 4
Gerrit-Owner: Jarried Lin jarried.lin@mediatek.com
Gerrit-Reviewer: Hung-Te Lin hungte@chromium.org
Gerrit-Reviewer: Yidi Lin yidilin@google.com
Gerrit-Reviewer: Yu-Ping Wu yupingso@google.com
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