Change in ...coreboot[master]: mb/google/hatch: Add USB port capabality ACPI support for USB2 port10
Aamir Bohra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31197
Change subject: mb/google/hatch: Add USB port capabality ACPI support for USB2 port10 ......................................................................
mb/google/hatch: Add USB port capabality ACPI support for USB2 port10
This implementation adds support to create ACPI package for USB port capablity(_UPC) and physical location of device(_PLD) for USB2 port 10.
BUG:b:123375275 TEST:Verify _UPC and _PLD ACPI packages gets published for USB2 Port 10 in SSDT and BT is functional in discrete and integrated mode.
Change-Id: Ifeab24505a700e8e4677be20074c7d0400769cec Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 2 files changed, 7 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/31197/1
diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index d3ad1a0..9953648 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -5,6 +5,7 @@ select DRIVERS_I2C_GENERIC select DRIVERS_I2C_HID select DRIVERS_SPI_ACPI + select DRIVERS_USB_ACPI select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_LPC select HAVE_ACPI_RESUME diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index cea64e4..2520d29 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -132,7 +132,7 @@ device usb 2.3 on end end chip drivers/usb/acpi - register "desc" = ""Bluetooth"" + register "desc" = ""Discrete bluetooth"" register "type" = "UPC_TYPE_INTERNAL" device usb 2.4 on end end @@ -147,6 +147,11 @@ device usb 2.6 on end end chip drivers/usb/acpi + register "desc" = ""Integrated CnVi bluetooth"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 2.9 on end + end + chip drivers/usb/acpi register "desc" = ""Left Type-C Port"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(1, 1)"
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31197 )
Change subject: mb/google/hatch: Add USB port capabality ACPI support for USB2 port10 ......................................................................
Patch Set 1: Code-Review+1
(2 comments)
https://review.coreboot.org/#/c/31197/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31197/1//COMMIT_MSG@7 PS1, Line 7: capabality capability
https://review.coreboot.org/#/c/31197/1//COMMIT_MSG@10 PS1, Line 10: capablity(_UPC) and physical location of device(_PLD) for USB2 port 10. Please add a space before each (.
Hello Subrata Banik, Paul Menzel, Rizwan Qureshi, Shelley Chen, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31197
to look at the new patch set (#2).
Change subject: mb/google/hatch: Add USB port capability ACPI support for USB2 port10 ......................................................................
mb/google/hatch: Add USB port capability ACPI support for USB2 port10
This implementation adds support to create ACPI package for USB port capability (_UPC) and physical location of device (_PLD) for USB2 port 10.
BUG:b:123375275 TEST:Verify _UPC and _PLD ACPI packages gets published for USB2 Port 10 in SSDT and BT is functional in discrete and integrated mode.
Change-Id: Ifeab24505a700e8e4677be20074c7d0400769cec Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 2 files changed, 7 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/31197/2
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31197 )
Change subject: mb/google/hatch: Add USB port capability ACPI support for USB2 port10 ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/#/c/31197/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31197/1//COMMIT_MSG@7 PS1, Line 7: capabality
capability
Corrected.
https://review.coreboot.org/#/c/31197/1//COMMIT_MSG@10 PS1, Line 10: capablity(_UPC) and physical location of device(_PLD) for USB2 port 10.
Please add a space before each (.
Ok. Done.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31197 )
Change subject: mb/google/hatch: Add USB port capability ACPI support for USB2 port10 ......................................................................
Patch Set 2: Code-Review+2
Subrata Banik has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31197 )
Change subject: mb/google/hatch: Add USB port capability ACPI support for USB2 port10 ......................................................................
mb/google/hatch: Add USB port capability ACPI support for USB2 port10
This implementation adds support to create ACPI package for USB port capability (_UPC) and physical location of device (_PLD) for USB2 port 10.
BUG:b:123375275 TEST:Verify _UPC and _PLD ACPI packages gets published for USB2 Port 10 in SSDT and BT is functional in discrete and integrated mode.
Change-Id: Ifeab24505a700e8e4677be20074c7d0400769cec Signed-off-by: Aamir Bohra aamir.bohra@intel.com Reviewed-on: https://review.coreboot.org/c/31197 Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 2 files changed, 7 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index 6a37325..01f8e09 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -5,6 +5,7 @@ select DRIVERS_I2C_GENERIC select DRIVERS_I2C_HID select DRIVERS_SPI_ACPI + select DRIVERS_USB_ACPI select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_LPC select HAVE_ACPI_RESUME diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 2bc4f78..511c2d6 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -134,7 +134,7 @@ device usb 2.3 on end end chip drivers/usb/acpi - register "desc" = ""Bluetooth"" + register "desc" = ""Discrete bluetooth"" register "type" = "UPC_TYPE_INTERNAL" device usb 2.4 on end end @@ -149,6 +149,11 @@ device usb 2.6 on end end chip drivers/usb/acpi + register "desc" = ""Integrated CnVi bluetooth"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 2.9 on end + end + chip drivers/usb/acpi register "desc" = ""Left Type-C Port"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(1, 1)"
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Aamir Bohra (Code Review) -
Furquan Shaikh (Code Review)
-
Paul Menzel (Code Review)
-
Subrata Banik (Code Review)