Julius Werner has submitted this change and it was merged. ( https://review.coreboot.org/19903 )
Change subject: rockchip/rk3399: fix rk_mipi_dsi_phy_init err ......................................................................
rockchip/rk3399: fix rk_mipi_dsi_phy_init err
This patch fix rk_mipi_dsi_phy_init error return.
Change-Id: Ie260975ad6ed26c37aa8bb65dfcef4db2407a2da Signed-off-by: Nickey Yang nickey.yang@rock-chips.com Reviewed-on: https://review.coreboot.org/19903 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Julius Werner jwerner@chromium.org --- M src/soc/rockchip/rk3399/mipi.c 1 file changed, 4 insertions(+), 3 deletions(-)
Approvals: Julius Werner: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/soc/rockchip/rk3399/mipi.c b/src/soc/rockchip/rk3399/mipi.c index 5c8f4c2..9491b91 100644 --- a/src/soc/rockchip/rk3399/mipi.c +++ b/src/soc/rockchip/rk3399/mipi.c @@ -95,7 +95,7 @@
static int rk_mipi_dsi_phy_init(struct rk_mipi_dsi *dsi) { - int ret, testdin, vco; + int testdin, vco;
int lane_mbps = div_round_up(dsi->lane_bps, USECS_PER_SEC); vco = (lane_mbps < 200) ? 0 : (lane_mbps + 100) / 200; @@ -156,7 +156,7 @@
write32(&mipi_regs->dsi_phy_rstz, PHY_ENFORCEPLL | PHY_ENABLECLK | PHY_UNRSTZ | PHY_UNSHUTDOWNZ); - return ret; + return 0; }
static inline int mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt) @@ -421,7 +421,8 @@ rk_mipi_dsi_dphy_timing_config(&rk_mipi); rk_mipi_dsi_dphy_interface_config(&rk_mipi); rk_mipi_dsi_clear_err(&rk_mipi); - rk_mipi_dsi_phy_init(&rk_mipi); + if (rk_mipi_dsi_phy_init(&rk_mipi) < 0) + return; rk_mipi_dsi_wait_for_two_frames(&rk_mipi, edid);
rk_mipi_dsi_set_mode(&rk_mipi, MIPI_DSI_CMD_MODE);