Attention is currently required from: Tarun Tuli.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74627 )
Change subject: mb/google/brya/marasov: Disable USB2 PHY SUS well power gating ......................................................................
Patch Set 1:
(4 comments)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174682): https://review.coreboot.org/c/coreboot/+/74627/comment/ca31443b_217e7551 PS1, Line 9: The patch disables PCH USB2 PHY power gating to prevent possible display flicker issue. Possible unwrapped commit description (prefer a maximum 72 chars per line)
File src/mainboard/google/brya/variants/marasov/overridetree.cb:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174682): https://review.coreboot.org/c/coreboot/+/74627/comment/b797d66b_567099c9 PS1, Line 88: trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174682): https://review.coreboot.org/c/coreboot/+/74627/comment/4092eb61_2e40f02c PS1, Line 91: register "usb2_phy_sus_pg_disable" = "1" trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174682): https://review.coreboot.org/c/coreboot/+/74627/comment/32f51b06_d0e24e8b PS1, Line 92: trailing whitespace