Change in coreboot[master]: mb/supermicro/x11-lga1151-series: Follow up GPIO macro changes
Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46621 )
Change subject: mb/supermicro/x11-lga1151-series: Follow up GPIO macro changes ......................................................................
mb/supermicro/x11-lga1151-series: Follow up GPIO macro changes
Following commit f50ea988b a couple of symbols are gone, so follow up that change for this board as well.
Change-Id: I09fd3a107447eb45bb46b7f0f821377943f140b2 Signed-off-by: Patrick Georgi pgeorgi@google.com --- M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/include/variant/gpio.h 1 file changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/46621/1
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/include/variant/gpio.h b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/include/variant/gpio.h index 93e0574..449349d 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/include/variant/gpio.h +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/include/variant/gpio.h @@ -80,13 +80,13 @@ PAD_NC(GPP_C19, NONE), PAD_NC(GPP_C20, NONE), PAD_NC(GPP_C21, NONE), - PAD_CFG_GPI_SMI(GPP_C22, 20K_PU, DEEP, EDGE_SINGLE, NONE), + PAD_CFG_GPI_SMI(GPP_C22, UP_20K, DEEP, EDGE_SINGLE, NONE), PAD_NC(GPP_C23, NONE),
/* GPIO Group GPP_D */ PAD_NC(GPP_D0, NONE), PAD_CFG_GPO(GPP_D1, 1, DEEP), - PAD_CFG_GPI_NMI(GPP_D2, 20K_PU, DEEP, EDGE_SINGLE, NONE), + PAD_CFG_GPI_NMI(GPP_D2, UP_20K, DEEP, EDGE_SINGLE, NONE), PAD_NC(GPP_D3, NONE), PAD_CFG_GPO(GPP_D4, 0, PLTRST), PAD_NC(GPP_D5, NONE), @@ -116,7 +116,7 @@ PAD_NC(GPP_E3, NONE), PAD_NC(GPP_E4, NONE), PAD_NC(GPP_E5, NONE), - PAD_CFG_GPI_NMI(GPP_E6, 20K_PU, PLTRST, EDGE_SINGLE, NONE), + PAD_CFG_GPI_NMI(GPP_E6, UP_20K, PLTRST, EDGE_SINGLE, NONE), PAD_NC(GPP_E7, NONE), PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), @@ -130,7 +130,7 @@ PAD_NC(GPP_F2, NONE), PAD_NC(GPP_F3, NONE), PAD_NC(GPP_F4, NONE), - PAD_CFG_GPI_APIC(GPP_F5, NONE, PLTRST), + PAD_CFG_GPI_APIC_HIGH(GPP_F5, NONE, PLTRST), PAD_CFG_GPO(GPP_F6, 1, PLTRST), PAD_CFG_GPO(GPP_F7, 1, PLTRST), PAD_CFG_GPO(GPP_F8, 1, PLTRST),
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46621 )
Change subject: mb/supermicro/x11-lga1151-series: Follow up GPIO macro changes ......................................................................
Patch Set 1: Code-Review+2
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46621 )
Change subject: mb/supermicro/x11-lga1151-series: Follow up GPIO macro changes ......................................................................
Patch Set 1: Code-Review+2
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46621 )
Change subject: mb/supermicro/x11-lga1151-series: Follow up GPIO macro changes ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/46621/1/src/mainboard/supermicro/x1... File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/include/variant/gpio.h:
https://review.coreboot.org/c/coreboot/+/46621/1/src/mainboard/supermicro/x1... PS1, Line 133: PAD_CFG_GPI_APIC_HIGH(GPP_F5, NONE, PLTRST), I hate these macros. It's barely visible that this adds PAD_CFG1_IOSSTATE_ things that are then defined to 0 based on a Kconfig. Might be ok...
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46621 )
Change subject: mb/supermicro/x11-lga1151-series: Follow up GPIO macro changes ......................................................................
mb/supermicro/x11-lga1151-series: Follow up GPIO macro changes
Following commit f50ea988b a couple of symbols are gone, so follow up that change for this board as well.
Change-Id: I09fd3a107447eb45bb46b7f0f821377943f140b2 Signed-off-by: Patrick Georgi pgeorgi@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46621 Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Arthur Heymans arthur@aheymans.xyz Reviewed-by: Nico Huber nico.h@gmx.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/include/variant/gpio.h 1 file changed, 4 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Arthur Heymans: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/include/variant/gpio.h b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/include/variant/gpio.h index 93e0574..449349d 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/include/variant/gpio.h +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/include/variant/gpio.h @@ -80,13 +80,13 @@ PAD_NC(GPP_C19, NONE), PAD_NC(GPP_C20, NONE), PAD_NC(GPP_C21, NONE), - PAD_CFG_GPI_SMI(GPP_C22, 20K_PU, DEEP, EDGE_SINGLE, NONE), + PAD_CFG_GPI_SMI(GPP_C22, UP_20K, DEEP, EDGE_SINGLE, NONE), PAD_NC(GPP_C23, NONE),
/* GPIO Group GPP_D */ PAD_NC(GPP_D0, NONE), PAD_CFG_GPO(GPP_D1, 1, DEEP), - PAD_CFG_GPI_NMI(GPP_D2, 20K_PU, DEEP, EDGE_SINGLE, NONE), + PAD_CFG_GPI_NMI(GPP_D2, UP_20K, DEEP, EDGE_SINGLE, NONE), PAD_NC(GPP_D3, NONE), PAD_CFG_GPO(GPP_D4, 0, PLTRST), PAD_NC(GPP_D5, NONE), @@ -116,7 +116,7 @@ PAD_NC(GPP_E3, NONE), PAD_NC(GPP_E4, NONE), PAD_NC(GPP_E5, NONE), - PAD_CFG_GPI_NMI(GPP_E6, 20K_PU, PLTRST, EDGE_SINGLE, NONE), + PAD_CFG_GPI_NMI(GPP_E6, UP_20K, PLTRST, EDGE_SINGLE, NONE), PAD_NC(GPP_E7, NONE), PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), @@ -130,7 +130,7 @@ PAD_NC(GPP_F2, NONE), PAD_NC(GPP_F3, NONE), PAD_NC(GPP_F4, NONE), - PAD_CFG_GPI_APIC(GPP_F5, NONE, PLTRST), + PAD_CFG_GPI_APIC_HIGH(GPP_F5, NONE, PLTRST), PAD_CFG_GPO(GPP_F6, 1, PLTRST), PAD_CFG_GPO(GPP_F7, 1, PLTRST), PAD_CFG_GPO(GPP_F8, 1, PLTRST),
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46621 )
Change subject: mb/supermicro/x11-lga1151-series: Follow up GPIO macro changes ......................................................................
Patch Set 2:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/2/6 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload TianoCore : FAIL : https://lava.9esec.io/r/23986 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload SeaBIOS : FAIL : https://lava.9esec.io/r/23985 "QEMU x86 q35/ich9" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/23984 "QEMU x86 q35/ich9" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/23983 "QEMU x86 i440fx/piix4" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/23981 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/23980
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
Angel Pons (Code Review)
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Arthur Heymans (Code Review)
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Nico Huber (Code Review)
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Patrick Georgi (Code Review)