[S] Change in coreboot[master]: soc/intel/meteorlake: Log CSE RO write protection info for MTL
Attention is currently required from: Tarun Tuli, Subrata Banik, Sridhar Siricilla.
Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69571 )
Change subject: soc/intel/meteorlake: Log CSE RO write protection info for MTL ......................................................................
Patch Set 2:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/69571/comment/31cd062b_46ef2db3 PS1, Line 9: Alder
Meteor Lake
Ack
https://review.coreboot.org/c/coreboot/+/69571/comment/7fa8c3ec_a4813f1d PS1, Line 14: abe0d81
use longer (12+ digit )
Ack
Commit Message:
https://review.coreboot.org/c/coreboot/+/69571/comment/85e007b5_fbd79660 PS2, Line 9: The patch logs CSE RO's write protection information for Alder Lake
Meteor
Ack
https://review.coreboot.org/c/coreboot/+/69571/comment/361979bf_ea7f3573 PS2, Line 21: YES
How did you test this? Did you enable SPI protection through MFIT and test the coreboot on Rex?
It is just a debug message. A port of ADL CL.
Patchset:
PS2:
@Kapil, can u please add a topic as in `backporting_from_adl`
Done
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Kapil Porwal (Code Review)