Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Angel Pons, Lean Sheng Tan.
Maximilian Brune has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66545 )
Change subject: mb/intel/adlrvp: Add ADL-S DDR5 UDIMM 1DPC ......................................................................
Patch Set 18:
(6 comments)
This change is ready for review.
Commit Message:
https://review.coreboot.org/c/coreboot/+/66545/comment/bd43954e_b851fffc PS16, Line 7: mainboard
mb
Done
https://review.coreboot.org/c/coreboot/+/66545/comment/84b388f0_e143ea88 PS16, Line 10: Boot Seabios -> Linux
Please add the versions (also below).
Done
https://review.coreboot.org/c/coreboot/+/66545/comment/e93adcd7_ac6cc134 PS16, Line 10: Seabios
SeaBIOS
Done
https://review.coreboot.org/c/coreboot/+/66545/comment/ab3c452f_c8f10391 PS16, Line 10: Boot Seabios -> Linux : Boot EDK2 -> Linux, Windows 10 : M.2 SSD Slot 1: PCH SSD : M.2 SSD Slot 2: PCH SSD : M.2 SSD Slot 3: PCH SSD, Backside : SATA Cable Port 1-3 : SATA Direct Connect Port : DisplayPort Port 1,2 : HDMI Port 1,2 : PCIE x4 Slot 1 : PCIE x4 Slot 3 : USB Ports 1-4 (Backpanel) : M.2. CNVI: WiFi (Linux works, Win 10 does not) : S3 (suspend to ram) (Linux works, Win 10 does not)
Would be nice if you formatted it as a list.
Done
File src/mainboard/intel/adlrvp/Kconfig:
https://review.coreboot.org/c/coreboot/+/66545/comment/0ac623fd_7c2e5ca1 PS17, Line 17: select SOC_INTEL_COMMON_BLOCK_IPU
How about: […]
Done
File src/mainboard/intel/adlrvp/ramstage.c:
https://review.coreboot.org/c/coreboot/+/66545/comment/4df3e745_38241a0f PS17, Line 67: //TODO find out if it's an ADL-S thing or board specific
Alternatively, move the Type-C stuff to a separate compilation unit and do not include it for ADL-S
I just wrapped it around preprocessor (I am too lazy). Hope that's also ok.
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Maximilian Brune (Code Review)