[M] Change in coreboot[master]: soc/amd/acpi: Expand 5 DPTC thermal profiles acpigen support for Alib
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68470 )
Change subject: soc/amd/acpi: Expand 5 DPTC thermal profiles acpigen support for Alib ......................................................................
soc/amd/acpi: Expand 5 DPTC thermal profiles acpigen support for Alib
Update acpigen_write_alib_dptc() to support extra 5 thermal profiles. User can use these profiles for dynamic thermal table switching support.
BUG=b:232946420 TEST=emerge-skyrim coreboot
Signed-off-by: EricKY Cheng ericky_cheng@compal.corp-partner.google.com Change-Id: I9e6d5c0fc6f492340c935899920d9ee7c9396256 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68470 Reviewed-by: Tim Van Patten timvp@google.com Reviewed-by: Raul Rangel rrangel@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Dtrain Hsu dtrain_hsu@compal.corp-partner.google.com --- M src/soc/amd/common/block/acpi/alib.c M src/soc/amd/common/block/include/amdblocks/alib.h 2 files changed, 177 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved Dtrain Hsu: Looks good to me, approved Tim Van Patten: Looks good to me, approved
diff --git a/src/soc/amd/common/block/acpi/alib.c b/src/soc/amd/common/block/acpi/alib.c index 3c01d85..da54248 100644 --- a/src/soc/amd/common/block/acpi/alib.c +++ b/src/soc/amd/common/block/acpi/alib.c @@ -102,3 +102,148 @@
acpigen_write_scope_end(); } + +void acpigen_write_alib_dptc_thermal_B(uint8_t *thermal_param_B, size_t thermal_param_B_len) +{ + /* Scope (_SB) */ + acpigen_write_scope("\_SB"); + + /* Table B for dynamic DPTC*/ + /* Scope (_SB) + * { + * Method (DTTB, 0, Serialized) + * { + * Debug = "DPTC: TABLE B" + * Name (THTB, Buffer (0x25) + * { + * ... + * }) + * _SB.ALIB + * 0x0C + * THTB + * } + * } + */ + acpigen_write_method_serialized("DTTB", 0); + acpigen_write_debug_string("DPTC: TABLE B"); + acpigen_dptc_call_alib("THTB", thermal_param_B, thermal_param_B_len); + acpigen_write_method_end(); + + acpigen_write_scope_end(); +} + +void acpigen_write_alib_dptc_thermal_C(uint8_t *thermal_param_C, size_t thermal_param_C_len) +{ + /* Scope (_SB) */ + acpigen_write_scope("\_SB"); + + /* Table C for dynamic DPTC*/ + /* Scope (_SB) + * { + * Method (DTTC, 0, Serialized) + * { + * Debug = "DPTC: TABLE C" + * Name (THTC, Buffer (0x25) + * { + * ... + * }) + * _SB.ALIB + * 0x0C + * THTC + * } + * } + */ + acpigen_write_method_serialized("DTTC", 0); + acpigen_write_debug_string("DPTC: TABLE C"); + acpigen_dptc_call_alib("THTC", thermal_param_C, thermal_param_C_len); + acpigen_write_method_end(); + + acpigen_write_scope_end(); +} + +void acpigen_write_alib_dptc_thermal_D(uint8_t *thermal_param_D, size_t thermal_param_D_len) +{ + /* Scope (_SB) */ + acpigen_write_scope("\_SB"); + + /* Table D for dynamic DPTC*/ + /* Scope (_SB) + * { + * Method (DTTD, 0, Serialized) + * { + * Debug = "DPTC: Using normal SOC DPTC Settings." + * Name (THTD, Buffer (0x25) + * { + * ... + * }) + * _SB.ALIB + * 0x0C + * THTD + * } + * } + */ + acpigen_write_method_serialized("DTTD", 0); + acpigen_write_debug_string("DPTC: TABLE D"); + acpigen_dptc_call_alib("THTD", thermal_param_D, thermal_param_D_len); + acpigen_write_method_end(); + + acpigen_write_scope_end(); +} + +void acpigen_write_alib_dptc_thermal_E(uint8_t *thermal_param_E, size_t thermal_param_E_len) +{ + /* Scope (_SB) */ + acpigen_write_scope("\_SB"); + + /* Table E for dynamic DPTC*/ + /* Scope (_SB) + * { + * Method (DTTE, 0, Serialized) + * { + * Debug = "DPTC: TABLE E" + * Name (THTE, Buffer (0x25) + * { + * ... + * }) + * _SB.ALIB + * 0x0C + * THTE + * } + * } + */ + acpigen_write_method_serialized("DTTE", 0); + acpigen_write_debug_string("DPTC: TABLE E"); + acpigen_dptc_call_alib("THTE", thermal_param_E, thermal_param_E_len); + acpigen_write_method_end(); + + acpigen_write_scope_end(); +} + +void acpigen_write_alib_dptc_thermal_F(uint8_t *thermal_param_F, size_t thermal_param_F_len) +{ + /* Scope (_SB) */ + acpigen_write_scope("\_SB"); + + /* Table F for dynamic DPTC*/ + /* Scope (_SB) + * { + * Method (DTTF, 0, Serialized) + * { + * Debug = "DPTC: TABLE F" + * Name (THTF, Buffer (0x25) + * { + * ... + * }) + * _SB.ALIB + * 0x0C + * THTF + * } + * } + */ + acpigen_write_method_serialized("DTTF", 0); + acpigen_write_debug_string("DPTC: TABLE F"); + acpigen_dptc_call_alib("THTF", thermal_param_F, thermal_param_F_len); + acpigen_write_method_end(); + + acpigen_write_scope_end(); +} diff --git a/src/soc/amd/common/block/include/amdblocks/alib.h b/src/soc/amd/common/block/include/amdblocks/alib.h index 3de4018..82d6935 100644 --- a/src/soc/amd/common/block/include/amdblocks/alib.h +++ b/src/soc/amd/common/block/include/amdblocks/alib.h @@ -20,6 +20,12 @@ ALIB_DPTC_VRM_MAXIMUM_CURRENT_LIMIT = 0xc, /* Picasso: SetVrmSocCurrentLimit (0xe) is not implemented in alib. */ ALIB_DPTC_VRM_SOC_CURRENT_LIMIT_ID = 0xe, + + ALIB_DPTC_STT_SKIN_TEMPERATURE_LIMIT_APU_ID = 0x22, + ALIB_DPTC_STT_M1_ID = 0x26, + ALIB_DPTC_STT_M2_ID = 0x27, + ALIB_DPTC_STT_C_APU_ID = 0x2C, + ALIB_DPTC_STT_MIN_LIMIT_ID = 0x2E, };
struct alib_dptc_param { @@ -30,7 +36,11 @@ void acpigen_write_alib_dptc_default(uint8_t *default_param, size_t default_param_len); void acpigen_write_alib_dptc_no_battery(uint8_t *no_battery_param, size_t no_battery_param_len); void acpigen_write_alib_dptc_tablet(uint8_t *tablet_param, size_t tablet_param_len); - +void acpigen_write_alib_dptc_thermal_B(uint8_t *thermal_param_B, size_t thermal_param_B_len); +void acpigen_write_alib_dptc_thermal_C(uint8_t *thermal_param_C, size_t thermal_param_C_len); +void acpigen_write_alib_dptc_thermal_D(uint8_t *thermal_param_D, size_t thermal_param_D_len); +void acpigen_write_alib_dptc_thermal_E(uint8_t *thermal_param_E, size_t thermal_param_E_len); +void acpigen_write_alib_dptc_thermal_F(uint8_t *thermal_param_F, size_t thermal_param_F_len); #endif /* !__ACPI__ */
#endif /* AMD_COMMON_ALIB_H */
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Felix Held (Code Review)