New patch to review for coreboot: 21c7fec libpayload: Switch xHCI shared ports back to EHCI on shutdown

[Nico Huber]

Nico Huber ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3791

-gerrit

commit 21c7feca1cddf746b39cbccf17c4e650a94e936d
Author: Nico Huber 
Date:   Fri Jul 19 14:03:47 2013 +0200

libpayload: Switch xHCI shared ports back to EHCI on shutdown

On Intel's Panther Point the xHCI ports are shared with an EHCI
    controller. Our xHCI driver switches them to xHCI, naturally. But
    we forgot to switch them back on shutdown, which left them
    unusable by a non-xHCI aware operating system.

Change-Id: I70ef08655a603b42ee939935d50cf77ea97878a3
    Signed-off-by: Nico Huber 
---
 payloads/libpayload/drivers/usb/xhci.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/payloads/libpayload/drivers/usb/xhci.c b/payloads/libpayload/drivers/usb/xhci.c
index c29d323..51f9422 100644
--- a/payloads/libpayload/drivers/usb/xhci.c
+++ b/payloads/libpayload/drivers/usb/xhci.c
@@ -110,6 +110,19 @@ xhci_switch_ppt_ports(pcidev_t addr)
    }
 }

+/* On Panther Point: switch all ports back to EHCI */
+static void
+xhci_switchback_ppt_ports(pcidev_t addr)
+{
+	if (pci_read_config32(addr, 0x00) == 0x1e318086) {
+		u32 reg32 = pci_read_config32(addr, 0xd0) & 0xf;
+		xhci_debug("Switching ports back:   0x%"PRIx32"\n", reg32);
+		pci_write_config32(addr, 0xd0, 0x00000000);
+		reg32 = pci_read_config32(addr, 0xd0) & 0xf;
+		xhci_debug("Still switched to xHCI: 0x%"PRIx32"\n", reg32);
+	}
+}
+
 static long
 xhci_handshake(volatile u32 *const reg, u32 mask, u32 wait_for, long timeout_us)
 {
@@ -389,6 +402,8 @@ xhci_shutdown(hci_t *const controller)

xhci_stop(controller);

+	xhci_switchback_ppt_ports(controller->bus_address);
+
    if (xhci->sp_ptrs) {
    	const size_t max_sp_bufs = xhci->capreg->Max_Scratchpad_Bufs;
    	for (i = 0; i < max_sp_bufs; ++i) {