Change in coreboot[master]: mb/google/zork/vilboz: set the eDP phy overriden for WWAN SKU

[chris wang (Code Review)]

Attention is currently required from: Chris Wang.
Hello Chris Wang,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/51938

to review the following change.

Change subject: mb/google/zork/vilboz: set the eDP phy overriden for WWAN SKU
......................................................................

mb/google/zork/vilboz: set the eDP phy overriden for WWAN SKU

Move the eDP phy overridden to variant for WWAN SKU.

BUG=b:171269338
BRANCH=firmware-zork-13434.B
TEST=emerge-zork coreboot chromeos-bootimage

Signed-off-by: Chris Wang 
Change-Id: I0400e8f78b152f260c632fba3cfa43aeca2f6776
---
M src/mainboard/google/zork/variants/vilboz/overridetree.cb
M src/mainboard/google/zork/variants/vilboz/variant.c
2 files changed, 13 insertions(+), 14 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/51938/1

diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb
index 6af363d..3f5bfc3 100644
--- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb
@@ -30,19 +30,6 @@
    register "telemetry_vddcr_soc_slope_mA" = "26559"
    register "telemetry_vddcr_soc_offset" = "89"

-	# eDP phy tuning settings
-	register "edp_phy_override" = "ENABLE_EDP_TUNINGSET"
-
-	# bit vector of phy, bit0=1: DP0, bit1=1: DP1, bit2=1: DP2 bit3=1: DP3
-	register "edp_physel" = "0x1"
-
-	register "edp_tuningset" = "{
-		.dp_vs_pemph_level = 0x00,
-		.margin_deemph = 0x004b,
-		.deemph_6db4 = 0x0,
-		.boostadj = 0x80,
-	}"
-
    # eDP power sequence. all pwr sequence numbers below are in uint of 4ms,
    # and "0" as default value
    register "edp_pwr_adjust_enable" = "1"
diff --git a/src/mainboard/google/zork/variants/vilboz/variant.c b/src/mainboard/google/zork/variants/vilboz/variant.c
index 57563cc..747e893 100644
--- a/src/mainboard/google/zork/variants/vilboz/variant.c
+++ b/src/mainboard/google/zork/variants/vilboz/variant.c
@@ -4,6 +4,7 @@
 #include <soc/pci_devs.h>
 #include <fw_config.h>
 #include <sar.h>
+#include "chip.h"

static const fsp_ddi_descriptor hdmi_ddi_descriptors[] = {
    { // DDI0, DP0, eDP
@@ -40,8 +41,19 @@
    soc_cfg = config_of_soc();

/* b:/174121847 Use external OSC to mitigate noise for WWAN sku. */
-	if (variant_has_wwan())
+	if (variant_has_wwan()) {
    	soc_cfg->acp_i2s_use_external_48mhz_osc = 1;
+
+		/* eDP phy tuning settings */
+		soc_cfg->edp_phy_override = ENABLE_EDP_TUNINGSET;
+		/* bit vector of phy, bit0=1: DP0, bit1=1: DP1, bit2=1: DP2 bit3=1: DP3 */
+		soc_cfg->edp_physel = 0x1;
+		/* override for 0.6v 0db swing 1, pre-emphasis 0 */
+		soc_cfg->edp_tuningset.dp_vs_pemph_level = 0x01;
+		soc_cfg->edp_tuningset.margin_deemph = 0x004b;
+		soc_cfg->edp_tuningset.deemph_6db4 = 0x00;
+		soc_cfg->edp_tuningset.boostadj = 0x80;
+	}
 }

/*