Attention is currently required from: V Sowmya, Furquan Shaikh, Rizwan Qureshi, Deepti Deshatty, Tim Wawrzynczak, Patrick Rudolph.
Hello V Sowmya, build bot (Jenkins), Furquan Shaikh, Maulik V Vaghela, Rizwan Qureshi, Sridhar Siricilla, Deepti Deshatty, Tim Wawrzynczak, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/52188
to look at the new patch set (#5).
Change subject: soc/intel/alderlake: Add tcss code
......................................................................
soc/intel/alderlake: Add tcss code
Changes to enable TCSS mux configuration during boot time.
Additionally enable FSP 'MultiPhaseSilicon' init to execute
TCSS mux configuration during boot.
TEST=Verified Superspeed USB typeC pendrive detection on boot
Change-Id: I6c11eae5946038363ac1f81cea4d2c4449bb90fd
Signed-off-by: Deepti Deshatty deepti.deshatty@intel.com
---
M src/soc/intel/alderlake/fsp_params.c
1 file changed, 9 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/52188/5
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I6c11eae5946038363ac1f81cea4d2c4449bb90fd
Gerrit-Change-Number: 52188
Gerrit-PatchSet: 5
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