Change in coreboot[master]: [WIP] compress rcven coarse plots

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48387 )

Change subject: [WIP] compress rcven coarse plots
......................................................................

[WIP] compress rcven coarse plots

Change-Id: I190207d85ff1b94c1a29ed4903cb07926090507a
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/sandybridge/raminit_common.c
1 file changed, 23 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/48387/1

diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 5c679d9..8149465 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -1117,17 +1117,17 @@
    return ret;
 }

-static void print_raw_statistics(ramctr_timing *ctrl, u32 statistics[NUM_LANES][4], int sz)
+static void print_raw_statistics(ramctr_timing *ctrl, u32 stats[NUM_LANES][4], int sz, int step)
 {
    printk(BIOS_ERR, "Delay\t01234567%c\n", ctrl->lanes == NUM_LANES ? '8' : ' ');

for (int j = 0; j < sz; j++) {
-		for (int i = 0; i < 32; i++) {
+		for (int i = 0; i < 32; i += step) {
    		printk(BIOS_ERR, "% 5d\t", i + j * 32);

int lane;
    		FOR_ALL_LANES {
-				const bool pass = !!(statistics[lane][j] & 1 << i);
+				const bool pass = !!(stats[lane][j] & 1 << i);
    			printk(BIOS_ERR, "%c", pass ? '.' : '#');
    		}
    		printk(BIOS_ERR, "\n");
@@ -1217,27 +1217,41 @@

static void find_rcven_pi_coarse(ramctr_timing *ctrl, int channel, int slotrank, int *upperA)
 {
+	const int step_size = 4;
+
    int rcven;
-	u32 statistics[NUM_LANES][4];
+	u32 statistics[NUM_LANES][4] = { 0 };
    int lane;

+	FOR_ALL_LANES {
+		MCHBAR32(lane_base[lane] + GDCRTRAININGRESULT(channel, 0)) = 0;
+		MCHBAR32(lane_base[lane] + GDCRTRAININGRESULT(channel, 1)) = 0;
+	}
+
    for (u32 logic_delay = 0; logic_delay < 2; logic_delay++) {
-		for (rcven = 0; rcven < 64; rcven++) {
+		for (rcven = 0; rcven < 64; rcven += step_size) {
    		FOR_ALL_LANES {
    			ctrl->timings[channel][slotrank].lanes[lane].rcven =
    				rcven + logic_delay * 64;
    		}
    		program_timings(ctrl, channel);

-			test_rcven(ctrl, channel, slotrank);
+			for (int i = 0; i < step_size; i++)
+				test_rcven(ctrl, channel, slotrank);
    	}
    	FOR_ALL_LANES {
-			statistics[lane][logic_delay * 2 + 0] = get_stats(channel, lane, 0);
-			statistics[lane][logic_delay * 2 + 1] = get_stats(channel, lane, 1);
+			const u32 stats_a = get_stats(channel, lane, 0);
+			const u32 stats_b = get_stats(channel, lane, 1);
+
+			/* Account for missing data points */
+			for (int i = 0; i < step_size; i++) {
+				statistics[lane][logic_delay * 2 + 0] |= stats_a << i;
+				statistics[lane][logic_delay * 2 + 1] |= stats_b << i;
+			}
    	}
    }
    printk(BIOS_ERR, "channel %d rank %d results:\n", channel, slotrank);
-	print_raw_statistics(ctrl, statistics, 4);
+	print_raw_statistics(ctrl, statistics, 4, step_size);
    printk(BIOS_ERR, "\n");

FOR_ALL_LANES {