Change in ...coreboot[master]: soc/intel/{fsp_baytrail,braswell}: Include microcode updates
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33560
Change subject: soc/intel/{fsp_baytrail,braswell}: Include microcode updates ......................................................................
soc/intel/{fsp_baytrail,braswell}: Include microcode updates
Change-Id: Id4a34486ef57be6eb395dee9714cb6c01253404e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/braswell/Makefile.inc M src/soc/intel/fsp_baytrail/Makefile.inc 2 files changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/33560/1
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index 1017d80..cd8343e 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -65,6 +65,8 @@ verstage-y += pmutil.c verstage-y += tsc_freq.c
+cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-4c-*) + CPPFLAGS_common += -I$(src)/soc/intel/braswell/ CPPFLAGS_common += -I$(src)/soc/intel/braswell/include CPPFLAGS_common += -I$(call strip_quotes,$(CONFIG_FSP_HEADER_PATH)) diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc index ca2b353..b1f13fa 100644 --- a/src/soc/intel/fsp_baytrail/Makefile.inc +++ b/src/soc/intel/fsp_baytrail/Makefile.inc @@ -59,6 +59,8 @@ ramstage-y += i2c.c ramstage-y += gfx.c
+cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-37-*) + CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/include CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/fsp
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33560
to look at the new patch set (#3).
Change subject: soc/intel/{fsp_baytrail,braswell}: Include microcode updates ......................................................................
soc/intel/{fsp_baytrail,braswell}: Include microcode updates
Change-Id: Id4a34486ef57be6eb395dee9714cb6c01253404e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/fsp_baytrail/Kconfig M src/soc/intel/fsp_baytrail/Makefile.inc 4 files changed, 4 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/33560/3
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33560 )
Change subject: soc/intel/{fsp_baytrail,braswell}: Include microcode updates ......................................................................
Patch Set 4: Code-Review+1
(1 comment)
https://review.coreboot.org/#/c/33560/4/src/soc/intel/fsp_baytrail/Makefile.... File src/soc/intel/fsp_baytrail/Makefile.inc:
https://review.coreboot.org/#/c/33560/4/src/soc/intel/fsp_baytrail/Makefile.... PS4, Line 62: cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-37-*) There's also 06-37-03 in 3rdparty/blobs/soc/intel/baytrail/.
Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/33560?usp=email )
Change subject: soc/intel/{fsp_baytrail,braswell}: Include microcode updates ......................................................................
Abandoned
-
Arthur Heymans (Code Review) -
Nico Huber (Code Review)
-
Stefan Reinauer (Code Review)