Change in coreboot[master]: cpu/intel/socket_441/Makefile.inc: Order entries
Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44223 ) Change subject: cpu/intel/socket_441/Makefile.inc: Order entries ...................................................................... cpu/intel/socket_441/Makefile.inc: Order entries Group lines by stages, then subdirs, then microcode. Within groups, order in ascending count of `../` in prefix and then alphabetically. Group CPU models separately from other subdirs, as they are special. Tested with BUILD_TIMELESS=1, Intel D945GCLF remains identical. Change-Id: I6762a00e12a2290fb566df3149746731c5f675a5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> --- M src/cpu/intel/socket_441/Makefile.inc 1 file changed, 14 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/44223/1 diff --git a/src/cpu/intel/socket_441/Makefile.inc b/src/cpu/intel/socket_441/Makefile.inc index e21bf03..d827747 100644 --- a/src/cpu/intel/socket_441/Makefile.inc +++ b/src/cpu/intel/socket_441/Makefile.inc @@ -1,15 +1,17 @@ -subdirs-y += ../model_106cx -subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache -subdirs-y += ../../x86/smm -subdirs-y += ../microcode -subdirs-y += ../hyperthreading -subdirs-y += ../speedstep - -bootblock-y += ../car/p4-netburst/cache_as_ram.S bootblock-y += ../car/bootblock.c -postcar-y += ../car/p4-netburst/exit_car.S +bootblock-y += ../car/p4-netburst/cache_as_ram.S romstage-y += ../car/romstage.c + +postcar-y += ../car/p4-netburst/exit_car.S + +subdirs-y += ../model_106cx + +subdirs-y += ../hyperthreading +subdirs-y += ../microcode +subdirs-y += ../speedstep +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/smm +subdirs-y += ../../x86/tsc -- To view, visit https://review.coreboot.org/c/coreboot/+/44223 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6762a00e12a2290fb566df3149746731c5f675a5 Gerrit-Change-Number: 44223 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Martin Roth <martinroth@google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-MessageType: newchange
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/44223 to look at the new patch set (#3). Change subject: cpu/intel/socket_441/Makefile.inc: Order entries ...................................................................... cpu/intel/socket_441/Makefile.inc: Order entries Group lines by stages, then subdirs, then microcode. Within groups, order in ascending count of `../` in prefix and then alphabetically. Group CPU models separately from other subdirs, as they are special. Tested with BUILD_TIMELESS=1, Intel D945GCLF remains identical. Change-Id: I6762a00e12a2290fb566df3149746731c5f675a5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> --- M src/cpu/intel/socket_441/Makefile.inc 1 file changed, 14 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/44223/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/44223 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6762a00e12a2290fb566df3149746731c5f675a5 Gerrit-Change-Number: 44223 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Martin Roth <martinroth@google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net> Gerrit-MessageType: newpatchset
Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/44223 ) Change subject: cpu/intel/socket_441/Makefile.inc: Order entries ...................................................................... Abandoned Sorry, I ran out of patience and energy to care about these changes any longer. -- To view, visit https://review.coreboot.org/c/coreboot/+/44223 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6762a00e12a2290fb566df3149746731c5f675a5 Gerrit-Change-Number: 44223 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Martin Roth <martinroth@google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net> Gerrit-MessageType: abandon
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Angel Pons (Code Review)