Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/27284
Change subject: mb/google/link: Use new PMBASE API ......................................................................
mb/google/link: Use new PMBASE API
Change-Id: If4d6c80e95469341f0c978f302f04508f50280bd Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/mainboard/google/link/mainboard_smi.c 1 file changed, 2 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/27284/1
diff --git a/src/mainboard/google/link/mainboard_smi.c b/src/mainboard/google/link/mainboard_smi.c index 0babb54..0bd164e 100644 --- a/src/mainboard/google/link/mainboard_smi.c +++ b/src/mainboard/google/link/mainboard_smi.c @@ -20,6 +20,7 @@ #include <southbridge/intel/bd82x6x/nvs.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/me.h> +#include <southbridge/intel/common/pmbase.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <cpu/intel/model_206ax/model_206ax.h> #include <elog.h> @@ -31,7 +32,6 @@ static u8 mainboard_smi_ec(void) { u8 cmd = google_chromeec_get_event(); - u32 pm1_cnt;
#if IS_ENABLED(CONFIG_ELOG_GSMI) /* Log this event */ @@ -44,9 +44,7 @@ printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
/* Go to S5 */ - pm1_cnt = inl(smm_get_pmbase() + PM1_CNT); - pm1_cnt |= (0xf << 10); - outl(pm1_cnt, smm_get_pmbase() + PM1_CNT); + write_pmbase32(PM1_CNT, read_pmbase32(PM1_CNT) | (0xf << 10)); break; }