Change in coreboot[master]: mb/google/dedede/variants/drawcia: Update TSR1 passive trip temperature
Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45859 )
Change subject: mb/google/dedede/variants/drawcia: Update TSR1 passive trip temperature ......................................................................
mb/google/dedede/variants/drawcia: Update TSR1 passive trip temperature
Update TSR1 passive trip temperature
BUG=b:169691800 BRANCH=None TEST=Built and tested on dedede system
Change-Id: I172391daca981d5591fa9cc5eacad92521dd0dc5 Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/45859/1
diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb index fa10152..715da7a 100644 --- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb +++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb @@ -75,7 +75,7 @@
register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 80, 1000)" register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 4000)" - register "policies.passive[2]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 1000)" + register "policies.passive[2]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 51, 1000)" register "policies.passive[3]" = "DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000)" register "policies.passive[4]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 60, 1000)"
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45859 )
Change subject: mb/google/dedede/variants/drawcia: Update TSR1 passive trip temperature ......................................................................
Patch Set 1:
Hi Karthik, Can you please help to review this CL as per bug c#6 and c#7 discussion ? Thanks.
Justin TerAvest has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45859 )
Change subject: mb/google/dedede/variants/drawcia: Update TSR1 passive trip temperature ......................................................................
Patch Set 1: Code-Review+2
Karthik Ramasubramanian has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45859 )
Change subject: mb/google/dedede/variants/drawcia: Update TSR1 passive trip temperature ......................................................................
mb/google/dedede/variants/drawcia: Update TSR1 passive trip temperature
Update TSR1 passive trip temperature
BUG=b:169691800 BRANCH=None TEST=Built and tested on dedede system
Change-Id: I172391daca981d5591fa9cc5eacad92521dd0dc5 Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45859 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Justin TerAvest teravest@chromium.org --- M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Justin TerAvest: Looks good to me, approved
diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb index fa10152..715da7a 100644 --- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb +++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb @@ -75,7 +75,7 @@
register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 80, 1000)" register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 4000)" - register "policies.passive[2]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 1000)" + register "policies.passive[2]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 51, 1000)" register "policies.passive[3]" = "DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000)" register "policies.passive[4]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 60, 1000)"
-
Justin TerAvest (Code Review) -
Karthik Ramasubramanian (Code Review)
-
Sumeet R Pawnikar (Code Review)