Martin L Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71592 )
Change subject: vc/google: Add and use POST_CODE_CLEAR definition ......................................................................
vc/google: Add and use POST_CODE_CLEAR definition
The CR50 code clears the post code value. Add this as a #define.
Signed-off-by: Martin Roth gaumless@gmail.com Change-Id: If3b73a3159ac8ac9ab08c6ff705b0ca289ab453c --- M src/commonlib/include/commonlib/console/post_codes.h M src/vendorcode/google/chromeos/cr50_enable_update.c 2 files changed, 20 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/71592/1
diff --git a/src/commonlib/include/commonlib/console/post_codes.h b/src/commonlib/include/commonlib/console/post_codes.h index d838815..ef296bd 100644 --- a/src/commonlib/include/commonlib/console/post_codes.h +++ b/src/commonlib/include/commonlib/console/post_codes.h @@ -28,6 +28,12 @@ #define POST_CODES_H
/** + * \brief Not an actual post-code - used to clear port80h + * + */ +#define POST_CODE_CLEAR 0x00 + +/** * \brief Entry into 'crt0.s'. reset code jumps to here * * First instruction that gets executed after the reset vector jumps. diff --git a/src/vendorcode/google/chromeos/cr50_enable_update.c b/src/vendorcode/google/chromeos/cr50_enable_update.c index 9ac33a5..6beea91 100644 --- a/src/vendorcode/google/chromeos/cr50_enable_update.c +++ b/src/vendorcode/google/chromeos/cr50_enable_update.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <bootstate.h> +#include <commonlib/console/post_codes.h> #include <console/console.h> #include <ec/google/chromeec/ec.h> #include <elog.h> @@ -133,7 +134,7 @@ mainboard_prepare_cr50_reset();
/* clear current post code avoid chatty eventlog on subsequent boot*/ - post_code(0); + post_code(POST_CODE_CLEAR);
/* * Older Cr50 firmware doesn't support the timeout parameter for the