Patch set updated for coreboot: 5df5159 superio/nuvoton: Add support for Nuvoton NCT6779D
Alec Ari (neotheuser@ymail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4589
-gerrit
commit 5df5159b24610dd950ac2c02cf2909f54b625d60 Author: Alec Ari neotheuser@ymail.com Date: Sun Dec 29 23:48:38 2013 -0600
superio/nuvoton: Add support for Nuvoton NCT6779D
Adds initial support for the Nuvoton NCT6779D Super I/O
Change-Id: I03b3c39e4409bd57e8c0759d9c3fdd160f0376d4 Signed-off-by: Alec Ari neotheuser@ymail.com --- src/superio/nuvoton/Kconfig | 2 + src/superio/nuvoton/Makefile.inc | 1 + src/superio/nuvoton/nct6779d/Makefile.inc | 23 ++++++++++ src/superio/nuvoton/nct6779d/early_serial.c | 45 +++++++++++++++++++ src/superio/nuvoton/nct6779d/nct6779d.h | 48 ++++++++++++++++++++ src/superio/nuvoton/nct6779d/superio.c | 68 +++++++++++++++++++++++++++++ 6 files changed, 187 insertions(+)
diff --git a/src/superio/nuvoton/Kconfig b/src/superio/nuvoton/Kconfig index 142738d..8bbfdb0 100644 --- a/src/superio/nuvoton/Kconfig +++ b/src/superio/nuvoton/Kconfig @@ -21,3 +21,5 @@ config SUPERIO_NUVOTON_WPCM450 bool config SUPERIO_NUVOTON_NCT5104D bool +config SUPERIO_NUVOTON_NCT6779D + bool diff --git a/src/superio/nuvoton/Makefile.inc b/src/superio/nuvoton/Makefile.inc index 18025c9..d115bac 100644 --- a/src/superio/nuvoton/Makefile.inc +++ b/src/superio/nuvoton/Makefile.inc @@ -19,3 +19,4 @@
subdirs-$(CONFIG_SUPERIO_NUVOTON_WPCM450) += wpcm450 subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += nct5104d +subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT6779D) += nct6779d diff --git a/src/superio/nuvoton/nct6779d/Makefile.inc b/src/superio/nuvoton/nct6779d/Makefile.inc new file mode 100644 index 0000000..9b2ee9c --- /dev/null +++ b/src/superio/nuvoton/nct6779d/Makefile.inc @@ -0,0 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2014 Alec Ari (neotheuser@ymail.com) +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +romstage-$(CONFIG_SUPERIO_NUVOTON_NCT6779D) += early_serial.c +ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT6779D) += superio.c + diff --git a/src/superio/nuvoton/nct6779d/early_serial.c b/src/superio/nuvoton/nct6779d/early_serial.c new file mode 100644 index 0000000..e33abbc --- /dev/null +++ b/src/superio/nuvoton/nct6779d/early_serial.c @@ -0,0 +1,45 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Alec Ari neotheuser@ymail.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include "nct6779d.h" + +static void pnp_enter_ext_func_mode(device_t dev) +{ + u16 port = dev >> 8; + outb(0x87, port); + outb(0x87, port); +} + +static void pnp_exit_ext_func_mode(device_t dev) +{ + u16 port = dev >> 8; + outb(0xaa, port); +} + +void nct6779d_enable_serial(device_t dev, u16 iobase) +{ + pnp_enter_ext_func_mode(dev); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_iobase(dev, PNP_IDX_IO0, iobase); + pnp_set_enable(dev, 1); + pnp_exit_ext_func_mode(dev); +} diff --git a/src/superio/nuvoton/nct6779d/nct6779d.h b/src/superio/nuvoton/nct6779d/nct6779d.h new file mode 100644 index 0000000..6013d87 --- /dev/null +++ b/src/superio/nuvoton/nct6779d/nct6779d.h @@ -0,0 +1,48 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Alec Ari neotheuser@ymail.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SUPERIO_NUVOTON_NCT6779D_NCT6779D_H +#define SUPERIO_NUVOTON_NCT6779D_NCT6779D_H + +#define NCT6779D_PAR 0x01 /* Parallel Port */ +#define NCT6779D_SP1 0x02 /* Com1 */ +#define NCT6779D_SP2 0x03 /* Com2 (UART B & IR) */ +#define NCT6779D_KBC 0x05 /* Keyboard Controller */ +#define NCT6779D_CIR 0x06 /* CIR */ +#define NCT6779D_HWMN 0x0b /* Hw-mon / Front panel LED */ + +#define NCT6779D_WDT_GPIO_V 0x08 +#define NCT6779D_GPIO_ALL_V 0x09 + +#define NCT6779D_WDT1 ((0 << 8) | NCT6779D_WDT_GPIO_V) +#define NCT6779D_GPIO0 ((1 << 8) | NCT6779D_WDT_GPIO_V) + +#define NCT6779D_GPIO1 ((1 << 8) | NCT6779D_GPIO_ALL_V) +#define NCT6779D_GPIO2 ((2 << 8) | NCT6779D_GPIO_ALL_V) +#define NCT6779D_GPIO3 ((3 << 8) | NCT6779D_GPIO_ALL_V) +#define NCT6779D_GPIO4 ((4 << 8) | NCT6779D_GPIO_ALL_V) +#define NCT6779D_GPIO5 ((5 << 8) | NCT6779D_GPIO_ALL_V) +#define NCT6779D_GPIO6 ((6 << 8) | NCT6779D_GPIO_ALL_V) +#define NCT6779D_GPIO7 ((7 << 8) | NCT6779D_GPIO_ALL_V) +#define NCT6779D_GPIO8 ((0 << 8) | NCT6779D_GPIO_ALL_V) + +void nct6779d_enable_serial(device_t dev, u16 iobase); + +#endif /* SUPERIO_NUVOTON_NCT6779D_NCT6779D_H */ diff --git a/src/superio/nuvoton/nct6779d/superio.c b/src/superio/nuvoton/nct6779d/superio.c new file mode 100644 index 0000000..eb15905 --- /dev/null +++ b/src/superio/nuvoton/nct6779d/superio.c @@ -0,0 +1,68 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Alec Ari neotheuser@ymail.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <device/pnp.h> +#include <superio/conf_mode.h> +#include <stdlib.h> +#include "nct6779d.h" + +static void nct6779d_init(device_t dev) +{ +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_alt_enable, + .init = nct6779d_init, + .ops_pnp_mode = &pnp_conf_mode_8787_aa, +}; + +static struct pnp_info pnp_dev_info[] = { + /* TODO: Some of the 0x07f8 etc. values may not be correct. */ + { &ops, NCT6779D_PAR, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, {0x07f8, 0}, }, + { &ops, NCT6779D_SP1, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, {0x07f8, 0}, }, + { &ops, NCT6779D_SP2, PNP_IO0 | PNP_IRQ0 | PNP_MSC0 | PNP_MSC1, {0x07f8, 0}, }, + { &ops, NCT6779D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1 | PNP_MSC0, {0x07f8, 0}, }, + { &ops, NCT6779D_CIR, PNP_IO0 | PNP_IRQ0 | PNP_MSC0 | PNP_MSC1, {0x07f8, 0}, }, + { &ops, NCT6779D_HWMN, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_MSC0 | PNP_MSC1, {0x07f8, 0}, }, + { &ops, NCT6779D_WDT1, PNP_IO0 | PNP_MSC0 | PNP_MSC1, {0x07f8, 0}, }, + { &ops, NCT6779D_GPIO0, PNP_EN | PNP_MSC0 | PNP_MSC1, }, + { &ops, NCT6779D_GPIO1, PNP_EN | PNP_MSC0 | PNP_MSC1, }, + { &ops, NCT6779D_GPIO2, PNP_EN | PNP_MSC0 | PNP_MSC1, }, + { &ops, NCT6779D_GPIO3, PNP_EN | PNP_MSC0 | PNP_MSC1, }, + { &ops, NCT6779D_GPIO4, PNP_EN | PNP_MSC0 | PNP_MSC1, }, + { &ops, NCT6779D_GPIO5, PNP_EN | PNP_MSC0 | PNP_MSC1, }, + { &ops, NCT6779D_GPIO6, PNP_EN | PNP_MSC0 | PNP_MSC1, }, + { &ops, NCT6779D_GPIO7, PNP_EN | PNP_MSC0 | PNP_MSC1, }, + { &ops, NCT6779D_GPIO8, PNP_EN | PNP_MSC0 | PNP_MSC1, }, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); +} + +struct chip_operations superio_nuvoton_nct6779d_ops = { + CHIP_NAME("NUVOTON NCT6779D Super I/O") + .enable_dev = enable_dev, +};
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Alec Ari