Change in coreboot[master]: mb/google/dedede/var/lantis: Configure IRQ as level triggered for ELA...

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50964 )

Change subject: mb/google/dedede/var/lantis: Configure IRQ as level triggered for ELAN TS
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mb/google/dedede/var/lantis: Configure IRQ as level triggered for ELAN TS

Follow vendor suggestion to configure IRQs as level triggered to prevent TS lost.

BUG=b:171440909
BRANCH=dedede
TEST=1. emerge-dedede coreboot chromeos-bootimage
     2. power on, suspend DUT to check TS is functional

Change-Id: I07a5cd5e2ac9caad9dbcca12e05bda7f08f42dce
Signed-off-by: Tony Huang 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50964
Tested-by: build bot (Jenkins) 
Reviewed-by: Karthik Ramasubramanian 
---
M src/mainboard/google/dedede/variants/lantis/overridetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Karthik Ramasubramanian: Looks good to me, approved

diff --git a/src/mainboard/google/dedede/variants/lantis/overridetree.cb b/src/mainboard/google/dedede/variants/lantis/overridetree.cb
index 18d654f..851744a 100644
--- a/src/mainboard/google/dedede/variants/lantis/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/lantis/overridetree.cb
@@ -141,7 +141,7 @@
    		chip drivers/i2c/generic
    			register "hid" = ""ELAN0001""
    			register "desc" = ""ELAN Touchscreen""
-				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D4_IRQ)"
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D4_IRQ)"
    			register "probed" = "1"
    			register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D5)"
    			register "reset_delay_ms" = "20"